Multi-mode crystal oscillators

Patent metadata

Field	Value
Publication number	US-9628088-B2
Application number	US-201414463658-A
Country	US
Kind code	B2
Filing date	Aug 19, 2014
Priority date	Aug 20, 2013
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

Digital control of a crystal oscillator is implemented in a manner that allows frequency accuracy to be traded off dynamically with power consumption. The oscillator transitions between a less accurate/lower power mode and a high accuracy/higher power mode smoothly without requiring any external clock source during the transition. Power consumption is optimized because the crystal oscillator provides the clock source during transitions between the power modes and no other clock source is needed for these transitions. The system can also optimize the startup time and steady state power consumption independently.

First claim

What is claimed is:

1. An oscillator circuit, comprising:
a crystal oscillator bias circuit including a variable current mirror circuit; and
a compensator circuit coupled to the crystal oscillator bias circuit, the compensator controlling operation of the crystal oscillator bias circuit in both a high power mode and a low power mode and controlling a ratio of the variable current mirror circuit.

2. The oscillator circuit of claim 1 , wherein the crystal oscillator bias circuit further comprises:
a variable capacitance element; and
a variable bias current.

3. The oscillator circuit of claim 2 , wherein the compensator circuit controls a value of the variable capacitance element and a value of the variable bias current.

4. The oscillator circuit of claim 3 , wherein the value of the variable capacitance element and the value of the variable bias current are selected by the compensator circuit based upon whether the oscillator circuit is operating in a high power mode or a low power mode.

5. The oscillator circuit of claim 3 , wherein the value of the variable capacitance element and the value of the variable bias current are varied in a plurality of steps by the compensator circuit to change the oscillator circuit from a high power mode to a low power mode.

6. The oscillator circuit of claim 3 , wherein the value of the variable capacitance element and the value of the variable bias current are varied in a plurality of steps by the compensator circuit to change the oscillator circuit from a low power mode to a high power mode.

7. An oscillator circuit, comprising:
a crystal oscillator bias circuit, wherein the crystal oscillator bias circuit further includes:
a variable capacitance element; and
a variable bias current; and

a compensator circuit coupled to the crystal oscillator bias circuit, wherein the compensator circuit adjusts both the value of the variable capacitance element and the value of the variable bias current from a first set of values to a second set of values in a plurality of steps in a manner that prevents the loss of clock cycles generated by the oscillator circuit, controls a value of the variable capacitance element and a value of the variable bias current, and controls operation of the crystal oscillator bias circuit in both a high power mode and a low power mode.

8. The oscillator circuit of claim 7 , wherein the first set of values corresponds to a first desired power mode and the second set of values corresponds to a second desired power mode.

9. A wireless communication device, comprising:
a transceiver circuit for generating communication signals for transmission to other devices and for processing received communication signals from the other devices; and
an oscillator circuit providing a reference signal to the transceiver circuit during transmission and reception, the oscillator circuit including:
a crystal oscillator bias circuit including:
a variable capacitance element;
a variable bias current;
a current mirror with a variable ratio; and

a compensator circuit coupled to the crystal oscillator bias circuit, the compensator controlling operation of the crystal oscillator bias circuit in both a high power mode and a low power mode and during transitions between power modes, and controlling values of the variable capacitance element, the variable bias current, and the variable ratio.

10. The wireless communication device of claim 9 , wherein the values of the variable capacitance element, the variable bias current, and the variable ratio are selected by the compensator circuit based upon whether the oscillator circuit is operating in a high power mode or a low power mode or transitioning between power modes.

11. The wireless communication device of claim 10 , wherein the compensator circuit adjusts the values from a first set of values to a second set of values in a plurality of steps in a manner that prevents the loss of clock cycles generated by the oscillator circuit.

12. The wireless communication device of claim 11 , wherein the first set of values corresponds to a first desired power mode and the second set of values corresponds to a second desired power mode.

13. The wireless communication device of claim 9 , wherein the oscillator circuit provides a clock reference signal to the compensator circuit in both a high power mode and a low power mode and during transitions between power modes.

14. A method for controlling an oscillator circuit, comprising:
generating an output signal by a crystal oscillator circuit, wherein the crystal oscillator circuit includes a crystal oscillator bias circuit;
controlling a variable capacitance element of the bias circuit by a compensator circuit;
controlling a variable bias current of the bias circuit by the compensator circuit; and
controlling a variable ratio for a current mirror of the bias circuit by the compensator circuit;
receiving a clock signal from the crystal oscillator circuit at the compensator circuit;
receiving measurements of the output signal as feedback at the compensator circuit;
generating control signals for the crystal oscillator circuit by the compensator circuit based upon the feedback; and
adjusting the crystal oscillator circuit from a first power mode to a second power mode using the control signal while maintain a continuous clock signal to the compensator circuit from the crystal oscillator circuit.

15. The method of claim 14 , further comprising:
adjusting values of the variable capacitance element, the variable bias current, and the variable ratio in a series of steps that prevent loss of dock cycles from the crystal oscillator circuit.

Assignees

• Texas Instruments Inc

Inventors

• Griffith Danielle
• Parikh Viral
• Smith Ryan
• Roine Per Torstein

Classifications

• H04B1/40

  Circuits · CPC title

• H03L7/02 Primary

  using a frequency discriminator comprising a passive frequency-determining element · CPC title