Microelectronic socket comprising a substrate and an insulative insert mated with openings in the substrate

US9491881B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9491881-B2
Application numberUS-201414164403-A
CountryUS
Kind codeB2
Filing dateJan 27, 2014
Priority dateJan 27, 2014
Publication dateNov 8, 2016
Grant dateNov 8, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A microelectronic socket having a two piece construction, wherein a first piece comprises a conductive socket substrate and the second piece comprises an insulative insert. The conductive socket substrate has a first surface, a second surface, and at least one opening extending therebetween. The insulative insert has a base portion with at least one projection extending therefrom. The insulative insert is mated with the conductive socket substrate such that the at least one projection resides within a corresponding conductive socket substrate opening. The insulative insert further includes a plurality of vias, wherein at least one of the plurality of vias extends through the insulative base and through an insulative insert projection, wherein a contact may be disposed within the via.

First claim

Opening claim text (preview).

What is claimed is: 1. A microelectronic socket, comprising: a conductive socket substrate having a first surface, a second surface, and a plurality of openings extending from the conductive socket substrate first surface to the conductive socket second surface, wherein the conductive socket substrate comprises a non-conductive core and a conductive material on an exterior surface of the non-conductive core; an insulative insert comprising a base portion having a first surface and a second surface, and a plurality of projections extending from the insulative insert base portion second surface, wherein the insulative insert is mated with the conductive socket substrate such that each of the plurality of insulative insert projections resides within a corresponding conductive socket substrate opening; a plurality of vias, wherein at least one of the plurality of vias extends from the insulative base portion first surface through one of the plurality of insulative insert projections; a plurality of contacts, wherein at least one of the plurality of contacts resides within at least one of the plurality of vias; and wherein the conductive socket substrate has a thickness defined between the conductive socket first surface and the conductive socket second surface and wherein at least one of the plurality of insulative insert projections has a height less than the conductive socket substrate thickness defining a recess, and further comprising a second conductive material disposed within the recess to form an electrical connection between one of the contacts and the conductive socket substrate. 2. The microelectronic socket of claim 1 , wherein the insulative insert base portion second surface contacts the conductive socket substrate first surface. 3. The microelectronic socket of claim 1 , wherein at least one of the plurality of contacts is in electrical contact with the conductive socket substrate. 4. The microelectronic socket of claim 1 , wherein one of the plurality of vias includes a slotted portion which provides an opening between the slotted portion and the insulative insert second surface, and further comprising a first conductive material disposed within the slotted portion to form a electrical connect between one of the contacts and the conductive socket substrate. 5. The microelectronic socket of claim 1 , wherein at least one of the plurality of insulative insert projections has a height substantially equal to the conductive socket substrate thickness. 6. The microelectronic socket of claim 1 , further including a plurality of interconnects, wherein each of the plurality of interconnects is attached to a corresponding contact. 7. The microelectronic socket of claim 1 , wherein the at least one contact comprises a cantilever contact. 8. The microelectronic socket of claim 7 , wherein the cantilever contact comprises a contact body disposed within the via of the at least one insulative insert projection and a spring cantilever portion extending over the insulative insert base portion first surface. 9. A method of fabricating a microelectronic socket, comprising: forming a conductive socket substrate comprising forming a plurality of openings in non-conductive substrate and plating a conductive material on the non-conductive substrate, such that the conductive socket has a first surface, a second surface, and a plurality of openings extending from the conductive socket substrate first surface to the conductive socket second surface; forming an insulative insert comprising a base portion having a first surface and a second surface, and a plurality of projections extending from the insulative insert base portion second surface; forming a plurality of vias, wherein at least one of the plurality of vias extends from the insulative base portion first surface through one of the plurality of insulative insert projections; mating the insulative insert with the conductive socket substrate such that each of the plurality of insulative insert projections resides within a corresponding conductive socket substrate opening; disposing at least one of a plurality of contacts within at least one of the plurality of vias; and wherein forming the conductive socket substrate comprises forming the conductive socket substrate having a thickness defined between the conductive socket first surface and the conductive socket second surface, and wherein forming the plurality of insulative insert projections comprises forming at least one of the plurality of insulative insert projections having a height less than the conductive socket substrate thickness defining a recess, and further comprising disposing a second conductive material within the recess to form an electrical connection between one of the contacts and the conductive socket substrate. 10. The method of claim 9 , further including disposing at least one of the plurality of contacts such that it is in electrical contact with the conductive socket substrate. 11. The method of claim 9 , wherein forming the plurality of vias comprises forming one of the plurality of vias to include a slotted portion which provides an opening between the slotted portion and the insulative insert second surface, and further comprising disposing a first conductive material within the slotted portion to form an electrical connection between one of the contacts and the conductive socket substrate. 12. A computing device, comprising: a board; a microelectronic socket attached to the board; a microelectronic device biased to the microelectronic socket; and wherein the microelectronic socket comprises: a conductive socket substrate having a first surface, a second surface, and a plurality of openings extending from the conductive socket substrate first surface to the conductive socket second surface, wherein the conductive socket substrate comprises a non-conductive core and a conductive material on an exterior surface of the non-conductive core; an insulative insert comprising a base portion having a first surface and a second surface, and a plurality of projections extending from the insulative insert base portion second surface, wherein the insulative insert is mated with the conductive socket substrate such that each of the plurality of insulative insert projections resides within a corresponding conductive socket substrate opening; a plurality of vias, wherein at least one of the plurality of vias extends from the insulative base portion first surface through one of the plurality of insulative insert projections; a plurality of contacts, wherein at least one of the plurality of contacts resides within at least one of the plurality of vias; wherein the conductive socket substrate has a thickness defined between the conductive socket first surface and the conductive socket second surface and wherein at least one of the plurality of insulative insert projections has a height less than the conductive socket substrate thickness defining a recess, and further comprising a second conductive material disposed within the recess to form an electrical connection between one of the contacts and the conductive socket substrate. 13. The computing device of claim 12 , wherein the insulative insert base portion second surface contacts the conductive socket substrate first surface. 14. The computing device of claim 12 , wherein at least one of the plurality of contacts is in electrical contact with the conductive socket substrate. 15. The computing device of claim 12 , wherein one of the plurality of vias includes a slotted portion which provides an opening between the slotted portion and the insulative inse

Assignees

Inventors

Classifications

  • H05K7/1069Primary

    with spring contact pieces · CPC title

  • associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes · CPC title

  • Plated through-holes or blind vias without lands · CPC title

  • Non-printed connector · CPC title

  • forming array of contacts or terminals · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9491881B2 cover?
A microelectronic socket having a two piece construction, wherein a first piece comprises a conductive socket substrate and the second piece comprises an insulative insert. The conductive socket substrate has a first surface, a second surface, and at least one opening extending therebetween. The insulative insert has a base portion with at least one projection extending therefrom. The insulativ…
Who is the assignee on this patent?
Heppner Joshua D, Zhang Zhichao, Nekkanty Srikant, and 2 more
What technology area does this patent fall under?
Primary CPC classification H05K7/1069. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).