Methods for producing interconnects in semiconductor devices

Patent metadata

Field	Value
Publication number	US-9425092-B2
Application number	US-201414211602-A
Country	US
Kind code	B2
Filing date	Mar 14, 2014
Priority date	Mar 15, 2013
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

A method for producing interconnects on a workpiece includes obtaining a workpiece substrate having a feature, depositing a conductive layer in the feature, to partially or fully fill the feature, depositing a copper fill to completely fill the feature if the feature is partially filled by the conductive layer, applying a copper overburden, thermally treating the workpiece, and removing the overburden to expose the substrate and the metalized feature.

First claim

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A method for forming an interconnect in a workpiece, the method comprising:
electrochemically depositing a second metallization layer on the workpiece comprising a nonmetallic substrate having a dielectric layer disposed over a substrate and a continuous first metallization layer disposed on the dielectric layer and having at least one microfeature comprising a recessed structure, wherein the first metallization layer at least partially fills a feature on the workpiece, where the first metallization layer is a single metal layer, and wherein the second metallization layer is a copper layer that is different from the metal of the first metallization layer;
electrochemically depositing a copper cap layer after filling the feature; and
annealing the workpiece to diffuse the metal of the second metallization layer into the metal of the first metallization layer.

2. The method of claim 1 , wherein the first metallization layer is selected from the group consisting of cobalt, nickel, and copper layers.

3. The method of claim 1 , wherein the second metallization layer is a copper or copper alloy layer.

4. The method of claim 3 , wherein the alloying metal includes a transition or noble metal.

5. The method of claim 3 , wherein the alloying metal is selected from the group consisting of Ag, Au, Co, Ni, Pd, and Pt.

6. The method of claim 1 , wherein the first metallization layer is a seed layer.

7. The method of claim 1 , wherein the second metallization layer partially fills the feature and further comprising electrochemically depositing a third metallization layer to further partially or completely fill the feature before the cap layer is applied.

8. The method of claim 7 , wherein the third metallization layer is a copper or copper alloy layer.

9. The method of claim 1 , wherein the annealing of the workpiece is carried out in a controlled manner to limit the diffusion of an alloying element of the second metallization layer to an upper portion of the feature.

10. The method of claim 1 , wherein the annealing of the workpiece is carried out to cause the diffusion of an alloying element of the second metallization layer to uniformly diffuse throughout the feature.

11. The method of claim 1 , wherein the workpiece further includes a barrier layer between the dielectric layer and the first metallization layer.

12. The method of claim 1 , further comprising using CMP to expose an upper surface of the workpiece.

13. The method of claim 1 , wherein the first metallization layer is a conformal layer.

14. The method of claim 13 , further comprising annealing the workpiece prior to deposition of the second metallization layer to reflow the first metallization layer.

15. The method of claim 1 , wherein the second metallization layer is a conformal layer.

16. The method of claim 15 , further comprising annealing the workpiece prior to deposition of the second metallization layer to reflow the first metallization layer.

17. A method for forming an interconnect in a workpiece, the method comprising:
electrochemically depositing a second metallization layer on the workpiece comprising a nonmetallic substrate having a dielectric layer disposed over a substrate and a continuous first metallization layer disposed on the dielectric layer and having at least one microfeature comprising a recessed structure, wherein the first metallization layer at least partially fills a feature on the workpiece, wherein the first metallization layer is a cobalt layer, and wherein the metal of the second metallization layer is a copper or copper alloy layer, and wherein the second metallization layer is a fill or cap layer;
electrochemically depositing a copper cap layer after filling the feature; and
annealing the workpiece to diffuse the metal of the second metallization layer into the metal of the first metallization layer.

18. A method for forming an interconnect in a workpiece, the method comprising:
electrochemically depositing a second metallization layer on the workpiece comprising a nonmetallic substrate having a dielectric layer disposed over a substrate and a continuous first metallization layer disposed on the dielectric layer and having at least one microfeature comprising a recessed structure, wherein the first metallization layer at least partially fills a feature on the workpiece, where the metal of the first metallization layer is copper, and wherein the metal of the second metallization layer is a copper alloy;
electrochemically depositing a copper cap layer after filling the feature; and
annealing the workpiece to diffuse the metal of the second metallization layer into the metal of the first metallization layer.

Assignees

• Applied Materials Inc

Inventors

• Emesh Ismail T
• Shaviv Roey
• Naik Mehul

Classifications

• H10W20/4437

  the principal metal being a transition metal · CPC title

• H10W20/0425

  comprising multiple stacked seed or nucleation layers · CPC title

• H10W20/4424 Primary

  Copper alloys · CPC title

• H10W20/4403

  based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title