Tungsten feature fill

US9240347B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9240347-B2
Application numberUS-201414502817-A
CountryUS
Kind codeB2
Filing dateSep 30, 2014
Priority dateMar 27, 2012
Publication dateJan 19, 2016
Grant dateJan 19, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

First claim

Opening claim text (preview).

The invention claimed is: 1. A method comprising: providing a substrate including a feature having sidewalls; conformally depositing tungsten in the feature to fill the feature with a first bulk tungsten layer to cover the sidewalls; etching a portion of the first bulk tungsten layer to leave an etched tungsten layer in the feature, including removing tungsten from a portion of the sidewalls of the feature to expose the portion of the sidewalls; and selectively depositing a second bulk tungsten layer on the etched tungsten layer. 2. The method of claim 1 , wherein the conformally depositing tungsten includes allowing a void to be formed within the first bulk tungsten layer. 3. The method of claim 2 , wherein etching the portion of the first bulk tungsten layer includes opening the void. 4. The method of claim 1 , wherein the conformally depositing tungsten includes allowing a seam running along the axis of the feature in the first bulk tungsten layer to be formed. 5. The method of claim 4 , wherein etching the portion of the first bulk tungsten layer includes etching the first tungsten bulk layer to remove tungsten through the point of seam formation. 6. The method of claim 1 , wherein selectively depositing a second bulk tungsten layer on the etched tungsten layer includes depositing the second bulk tungsten layer on the etched tungsten layer without forming a nucleation layer in the feature after etching the portion of the first bulk tungsten layer. 7. The method of claim 1 , wherein the feature is a vertical feature. 8. The method of claim 1 , wherein the feature is a horizontal feature. 9. The method of claim 1 , wherein etching the portion of the first tungsten bulk layer includes exposing the first tungsten bulk layer to radical species. 10. The method of claim 1 , wherein etching the portion of the first tungsten bulk layer includes exposing the first tungsten bulk layer to a remotely-generated plasma. 11. The method of claim 1 , wherein etching a portion of the first bulk tungsten layer includes non-conformal etching of the first bulk tungsten layer. 12. The method of claim 1 , wherein etching a portion of the first bulk tungsten layer includes conformal etching of the first bulk tungsten layer. 13. The method of claim 1 , wherein etching a portion of the first bulk tungsten layer includes selectively etching tungsten with respect to an under-layer lining the feature on which the first tungsten bulk layer is deposited. 14. A method comprising: providing a substrate including a feature including a constriction; depositing tungsten in the feature through the constriction; etching the deposited tungsten through the constriction to leave an etched tungsten layer in the feature below the constriction and to expose sidewalls of the feature above the constriction; and selectively depositing a second bulk tungsten layer on the etched tungsten layer. 15. A method comprising: providing a substrate including a feature; depositing a first bulk tungsten layer in the feature; etching the first bulk tungsten layer to form an etched tungsten layer, wherein etching the first bulk tungsten layer includes removing tungsten in the feature up to a recess depth thereby leaving exposed sidewalls of the feature; and depositing a second bulk tungsten layer in the feature. 16. The method of claim 15 , wherein the first bulk layer only partially fills the feature. 17. The method of claim 16 , wherein etching the first bulk layer comprises lateral etching of a region of the first bulk layer. 18. The method of claim 15 , wherein the second bulk tungsten layer is selectively deposited on the etched tungsten layer. 19. The method of claim 1 , wherein removing tungsten from a portion of the sidewalls of the feature to expose the portion of the sidewalls comprises removing tungsten to leave a discontinuous film of tungsten on the sidewalls. 20. The method of claim 15 wherein etching the deposited tungsten through the constriction to exposing sidewalls of the feature above the contriction comprises leaving a discontinuous film of tungsten on the sidewalls.

Assignees

Inventors

Classifications

  • by using multiple deposition steps separated by etching steps · CPC title

  • characterised by the filling method or the material of the conductive fill · CPC title

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • using plasmas · CPC title

  • by chemical means · CPC title

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Frequently asked questions

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What does patent US9240347B2 cover?
Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods de…
Who is the assignee on this patent?
Novellus Systems Inc
What technology area does this patent fall under?
Primary CPC classification H10P14/432. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).