Closing block family based on soft and hard closure criteria

Patent metadata

Field	Value
Publication number	US-2024168670-A1
Application number	US-202418431101-A
Country	US
Kind code	A1
Filing date	Feb 2, 2024
Priority date	Aug 13, 2020
Publication date	May 23, 2024
Grant date	—

Abstract

A system includes a memory device and a processing device, operatively coupled to the memory device. The processing device initializes a block family associated with the memory device and a timer associated with the block family. In response to the timer reaching a soft closure value, the processing device performs a soft closure of the block family and a hard closure of the block family in response to a first of the timer reaching a hard closure value or the block family satisfying a hard closure criteria. The processing device detects a first write amplification of a previously closed block family that employed the hard closure value and increases the hard closure value by an amount of time calculated to reduce a second write amplification, of the block family, to below a threshold write amplification.

First claim

What is claimed is:

1 . A system comprising:
a memory device; and a processing device, operatively coupled to the memory device, the processing device to perform operations, comprising:
initializing a block family associated with the memory device;
initializing a timer associated with the block family; and
in response to the timer reaching a soft closure value:
performing a soft closure of the block family;
performing a hard closure of the block family in response to a first of the timer reaching a hard closure value or the block family satisfying a hard closure criteria;
detecting a first write amplification of a previously closed block family that employed the hard closure value; and
increasing the hard closure value by an amount of time calculated to reduce a second write amplification, of the block family, to below a threshold write amplification.

2 . The system of claim 1 , wherein the operations further comprise setting the hard closure value of the timer based on at least one of a workload of the processing device, a reference temperature associated with the block family, or a performance expectation of the processing device.

3 . The system of claim 1 , wherein the operations further comprise setting the hard closure value of the timer as the soft closure value plus an additional threshold percentage of the soft closure value.

4 . The system of claim 1 , wherein the operations further comprise:
after initializing the block family, responsive to beginning to program a block residing on the memory device, associating the block with the block family; and evaluating the hard closure criteria by:
determining an amount of time until filling the block completely with data being received from a host system; and
deciding whether to finish programming the block based on the amount of time and a remainder of time left until the timer reaches the hard closure value.

5 . The system of claim 4 , wherein the operations further comprise, in response to deciding to not finish programming the block, one of:
leaving empty an unwritten portion of the block; or writing dummy data to the unwritten portion of the block.

6 . The system of claim 4 , wherein the operations further comprise, in response to deciding to not finish programming the block:
creating a first partition of a written portion of the block; associating the first partition with the block family; and creating a second partition of an unwritten portion of the block for association with a new block family.

7 . The system of claim 4 , wherein, in response to deciding to finish programming the block, the operations further comprise finish programming the block with data received from the host system before performing the hard closure of the block family.

8 . The system of claim 1 , wherein the operations further comprise:
detecting a bit error rate of a previously closed block family that employed the hard closure value, wherein the bit error rate is above a threshold acceptable bit error rate; and reducing the hard closure value by an amount of time calculated to reduce the bit error rate to below the threshold acceptable bit error rate.

9 . A method comprising:
initializing, by a processing device, a block family associated with a memory device; initializing a timer associated with the block family; and in response to the timer reaching a soft closure value:
performing a soft closure of the block family;
performing a hard closure of the block family in response to a first of the timer reaching a hard closure value or the block family satisfying a hard closure criteria;
detecting a first write amplification of a previously closed block family that employed the hard closure value; and
increasing, by the processing device, the hard closure value by an amount of time calculated to reduce a second write amplification, of the block family, to below a threshold write amplification.

10 . The method of claim 9 , further comprising setting the hard closure value of the timer based on at least one of a workload of the processing device, a reference temperature associated with the block family, or a performance expectation of the processing device.

11 . The method of claim 9 , further comprising setting the hard closure value of the timer as the soft closure value plus an additional threshold percentage of the soft closure value.

12 . The method of claim 9 , further comprising:
after initializing the block family, responsive to beginning to program a block residing on the memory device, associating the block with the block family; and evaluating the hard closure criteria by: determining an amount of time until filling the block completely with data being received from a host system; and deciding whether to finish programming the block based on the amount of time and a remainder of time left until the timer reaches the hard closure value.

13 . The method of claim 12 , further comprising, in response to deciding to not finish programming the block, one of:
leaving empty an unwritten portion of the block; or writing dummy data to the unwritten portion of the block.

14 . The method of claim 12 , further comprising, in response to deciding to not finish programming the block:
creating a first partition of a written portion of the block; associating the first partition with the block family; and creating a second partition of an unwritten portion of the block for association with a new block family.

15 . The method of claim 12 , wherein, in response to deciding to finish programming the block, the method further comprising to finish programming the block with the data received from the host system before performing the hard closure of the block family.

16 . The method of claim 9 , further comprising:
detecting a bit error rate of a previously closed block family that employed the hard closure value, wherein the bit error rate is above a threshold acceptable bit error rate; and reducing the hard closure value by an amount of time calculated to reduce the bit error rate to below the threshold acceptable bit error rate.

17 . A non-transitory computer-readable storage medium that stores instructions, which when executed by a processing device of a memory device, cause the processing device to perform operations comprising:
initializing a block family associated with a memory device; initializing a timer associated with the block family; and in response to the timer reaching a soft closure value:
performing a soft closure of the block family;
performing a hard closure of the block family in response to a first of the timer reaching a hard closure value or the block family satisfying a hard closure criteria;
detecting a first write amplification of a previously closed block family that employed the hard closure value; and
increasing the hard closure value by an amount of time calculated to reduce a second write amplification, of the block family, to below a threshold write amplification.

18 . The non-transitory computer-readable storage medium of claim 17 , wherein the operations further comprise setting the hard closure value of the timer based on at least one of a workload of the processing device, a reference temperature associated with the block family, or a performance expectation of the processing device.

19 . The non-transitory computer-readable storage medium of claim 17 , wherein the operations further comprise setting the hard closure value of the timer as the soft closure value plus an add

Assignees

• Micron Technology Inc

Inventors

• Sheperek Michael
• Koudele Larry J
• Williams Steven S

Classifications

• G06F3/064 Primary

  Management of blocks · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F11/0757

  by exceeding a time limit, i.e. time-out, e.g. watchdogs · CPC title

• G06F11/076

  by exceeding a count or rate limit, e.g. word- or bit count limit · CPC title