Open block stability scanning

US9858002B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9858002-B1
Application numberUS-201615154501-A
CountryUS
Kind codeB1
Filing dateMay 13, 2016
Priority dateMay 13, 2016
Publication dateJan 2, 2018
Grant dateJan 2, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems and methods are disclosed for open block stability scanning. When a solid state memory block remains in an open state, where the block is only partially filled with written data, for a prolonged period of time, a circuit may perform a scan on the block to determine the stability of the stored data. When the scan indicates that the data is below a stability threshold, the data may be refreshed by reading the data and writing it to a new location. When the scan indicates that the data is above a stability threshold, the circuit may extend the time period in which the block may remain in the open state.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a circuit configured to: monitor an amount of time a block of a solid-state memory remains in an open state where the block has not been fully filled with data; in response to reaching an open block time threshold: perform a scan on the block to determine a stability value of data in the block; and extend the open block time threshold without refreshing the data when the stability value indicates that the data is stable. 2. The apparatus of claim 1 further comprising: the scan includes: read the data from the block; detect a number of errors in the data; determine the stability value based on the number of errors; and the circuit is configured to extend the open block time threshold without refreshing the data when the stability value is above a first stability threshold value. 3. The apparatus of claim 2 further comprising reading data from the block for the scan includes reading N most recently written pages from the block, where N is an integer value less than a number of pages in the block. 4. The apparatus of claim 2 comprising the circuit further configured to refresh the data when the stability value is below the first stability threshold value, including: read the data from the block; and write the data to a new location. 5. The apparatus of claim 4 comprising the circuit further configured to extend the open block time threshold by a variable amount based on how close the stability value is to the first stability threshold value. 6. The apparatus of claim 4 comprising the circuit further configured to: compare the stability value to a plurality of tiered stability thresholds including the first stability threshold value; and extend the open block time threshold by different amounts based on which of the tiered stability thresholds the stability value exceeds. 7. The apparatus of claim 1 further comprising: the scan includes: read the data from the block; determine whether error correction failed on a first read attempt; and determine the stability value to indicate the data is not stable when the error correction failed on the first read attempt. 8. A method comprising: monitoring an amount of time a block of a solid-state memory remains in an open state where the block has not been fully filled with data; in response to reaching an open block time threshold: performing a scan on the block to determine a stability value of data in the block; and extending the open block time threshold without refreshing the data when the stability value is above a first stability threshold value. 9. The method of claim 8 further comprising: the scan includes: reading the data from the block; detecting a number of errors in the data; comparing the number of errors to an error correction code capability; and determining the stability value based on the comparison. 10. The method of claim 9 further comprising reading data from the block for the scan includes reading N most recently written pages from the block, where N is an integer value less than a number of pages in the block. 11. The method of claim 8 further comprising: the scan includes: reading the data from the block; detecting a read retry rate required to read the data; and determining the stability value based on read retry rate. 12. The method of claim 8 further comprising: refreshing the data when the stability value is below the first stability threshold value, including: reading the data from the block; and writing the data to a new location. 13. The method of claim 8 further comprising: extending the open block time threshold by a variable amount based on how close the stability value is to the first stability threshold value. 14. The method of claim 8 further comprising: comparing the stability value to a plurality of tiered stability thresholds including the first stability threshold value; and extending the open block time threshold by different amounts based on which of the tiered stability thresholds the stability value exceeds. 15. An apparatus comprising: a nonvolatile solid state memory; a circuit configured to: monitor an amount of time a block of the solid-state memory remains in an open state where the block includes unwritten pages; in response to reaching an open block time threshold: perform a scan on the block to determine a number of errors encountered in data of the block; and extend the open block time threshold without refreshing the data when the number of errors is below a first stability threshold value. 16. The apparatus of claim 15 further comprising reading data from the block for the scan includes reading N most recently written pages from the block, where N is an integer value less than a number of pages in the block. 17. The apparatus of claim 15 comprising the circuit further configured to refresh the data when the number of errors is above the first stability threshold value, including: read the data from the block; and write the data to a new location, including to free pages of the block. 18. The apparatus of claim 15 comprising the circuit further configured to extend the open block time threshold by a variable amount based on how close the number of errors is to the first stability threshold value. 19. The apparatus of claim 15 comprising the circuit further configured to: extend the open block time threshold by a first amount when the is below the first stability threshold value; and extend the open block time by a second amount longer than the first amount when the number of errors is below a second stability threshold value. 20. The apparatus of claim 15 further comprising the first stability threshold value is based on an error correction code (ECC) capability of the apparatus.

Assignees

Inventors

Classifications

  • Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step · CPC title

  • Monitoring storage devices or systems · CPC title

  • Management of blocks · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • G06F3/0619Primary

    in relation to data integrity, e.g. data losses, bit errors · CPC title

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What does patent US9858002B1 cover?
Systems and methods are disclosed for open block stability scanning. When a solid state memory block remains in an open state, where the block is only partially filled with written data, for a prolonged period of time, a circuit may perform a scan on the block to determine the stability of the stored data. When the scan indicates that the data is below a stability threshold, the data may be ref…
Who is the assignee on this patent?
Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification G11C16/3431. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 02 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).