Open block family duration limited by time and temperature

Patent metadata

Field	Value
Publication number	US-2022057934-A1
Application number	US-202016947819-A
Country	US
Kind code	A1
Filing date	Aug 19, 2020
Priority date	Aug 19, 2020
Publication date	Feb 24, 2022
Grant date	—

Abstract

A includes a memory device and a processing device, operatively coupled to the memory device. The processing device is to: initialize a block family associated with the memory device; initialize a timer at initialization of the block family; and aggregate temperature values received from sensor(s) of the memory device over time to generate an aggregate temperature. Responsive to programming a page residing on the memory device, the processing device associates the page with the block family. The processing device closes the block family in response to the aggregate temperature being greater than a first temperature value and the timer reaching a first time value. The processing device closes the block family in response to the aggregate temperature being less than or equal to the first temperature value and the timer reaching a second time value that is greater than the first time value.

First claim

What is claimed is:

1 . A system comprising:
a memory device; and a processing device, operatively coupled to the memory device, the processing device to perform operations, comprising:
initializing a block family associated with the memory device;
initializing a timer at initialization of the block family;
aggregating a plurality of temperature values received from one or more temperature sensors of the memory device over time to determine an aggregate temperature;
responsive to programming a page residing on the memory device, associating the page with the block family;
closing the block family in response to the aggregate temperature being greater than a first temperature value and the timer reaching a first time value; and
closing the block family in response to the aggregate temperature being less than or equal to the first temperature value and the timer reaching a second time value that is greater than the first time value.

2 . The system of claim 1 , wherein the timer is associated with a system clock, and the operations further comprise, responsive to closing the block family, initializing a new block family.

3 . The system of claim 2 , wherein, for use of the first time value, the aggregate temperature is between the first temperature value and a second temperature value that is higher than the first temperature value, and wherein the operations further comprise:
initializing the timer in response to initialization of the new block family; responsive to programming a second page residing on the memory device, associating the second page with the new block family; closing the new block family in response to the aggregate temperature being between the first temperature value and the second temperature value and the timer reaching the first time value; and closing the new block family in response to the aggregate temperature being greater than or equal to the second temperature value and the timer reaching a third time value that is less than the first time value.

4 . The system of claim 1 , wherein the operations further comprise:
storing, in non-volatile memory, a value of the timer before powering down the system while the block family is still open; detecting a power on of the system; measuring a data state metric associated with one or more memory cell of the page of the memory device; comparing a level of the data state metric to a temporal voltage shift function to estimate a time after program value of the page; and incrementing the value of the timer, restored from the non-volatile memory, based on the time after program value.

5 . The system of claim 1 , wherein the operations further comprise:
storing, in non-volatile memory, a value of the timer before powering down the system while the block family is still open; tracking, using a low-power clock, a time period the memory device is powered off; detecting a power on of the system; and incrementing the value of the timer, restored from the non-volatile memory, by the time period.

6 . The system of claim 1 , wherein the operations further comprise:
storing, in non-volatile memory, a value of the timer and a fail bit count of pages within the block family before powering down the system while the block family is still open; detecting a power on of the system; estimating a temporal voltage shift (TVS) value, within memory cells of the pages, that results in approximately the fail bit count within the block family; estimating a time period the memory device has been powered off based on the estimated TVS value; and incrementing a value of the timer, restored from the non-volatile memory, by the time period.

7 . The system of claim 1 , wherein the operations further comprise, responsive to closing the block family, associating the block family with a first threshold voltage offset bin.

8 . A method comprising:
initializing, by a processing device, a block family associated with a memory device; initializing a timer associated with a system clock at initialization of the block family; responsive to programming a page residing on the memory device, associating the page with the block family; measuring, by the processing device, a temporal voltage shift (TVS) value of a voltage within one or more memory cell of the page in response to the timer reaching a first time value; and closing, by the processing device, the block family in response to the TVS value being greater than or equal to a threshold TVS value.

9 . The method of claim 8 , further comprising:
in response to the TVS value being less than the threshold TVS value, waiting for the timer to reach a second time value greater than the first time value; and closing the block family in response to the timer reaching the second time value.

10 . The method of claim 9 , further comprising determining the second time value as a function of how close the TVS value is from reaching the threshold TVS value.

11 . The method of claim 8 , further comprising, responsive to closing the block family, initializing a new block family.

12 . The method of claim 11 , further comprising:
initializing the timer in response to initialization of the new block family; responsive to programming a second page residing on the memory device, associating the second page with the new block family; measuring a second TVS value of a voltage within one or more memory cell of the second page in response to the timer reaching the first time value; and closing, by the processing device, the new block family in response to the second TVS value being greater than or equal to the threshold TVS value.

13 . The method of claim 8 , further comprising, responsive to closing the block family, associating the block family with a first threshold voltage offset bin.

14 . A method comprising:
initializing, by a processing device, a block family associated with a memory device; initializing a timer at initialization of the block family; aggregating a plurality of temperature values received from one or more temperature sensors of the memory device over time to determine an aggregate temperature; responsive to programming a page residing on the memory device, associating the page with the block family; closing, by the processing device, the block family in response to the timer reaching a first time value and the aggregate temperature being greater than a first temperature value; and closing, by the processing device, the block family in response to the timer reaching a second time value that is greater than the first time value and the aggregate temperature being less than or equal to the first temperature value.

15 . The method of claim 14 , wherein the timer is associated with a system clock, the method further comprising, responsive to closing the block family, initializing a new block family.

16 . The method of claim 15 , wherein, for use of the first time value, the aggregate temperature is between the first temperature value and a second temperature value that is higher than the first temperature value, the method further comprising:
initializing the timer in response to initialization of the new block family; closing the new block family in response to the timer reaching the first time value and the aggregate temperature being between the first temperature value and the second temperature value; and closing the new block family when the timer reaches a third time value that is greater than the first time value and the aggregate temperature being greater than or equal to the second temperature value.

Assignees

• Micron Technology Inc

Inventors

• Sheperek Michael
• Koudele Larry J
• Liikanen Bruce A
• Kientz Steven Michael
• Muchherla Kishore Kumar

Classifications

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G11C16/349

  Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles · CPC title

• G11C16/3418

  Disturbance prevention or evaluation; Refreshing of disturbed memory data · CPC title

• G11C7/20

  Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory · CPC title

• G11C7/04

  with means for avoiding disturbances due to temperature effects · CPC title