Common cooling solution for multiple packages

Patent metadata

Field	Value
Publication number	US-2022415866-A1
Application number	US-202117360862-A
Country	US
Kind code	A1
Filing date	Jun 28, 2021
Priority date	Jun 28, 2021
Publication date	Dec 29, 2022
Grant date	—

Abstract

An apparatus for a common cooling solution for multiple packages of a common height, including: a first die package; a second die package having a same height as the first die package; and a cooling element thermally coupled to the first die package and the second die package by a planar surface of the cooling element.

First claim

What is claimed is:

1 . An apparatus for a common cooling solution for multiple packages of a common height, comprising:
a first die package; a second die package having a same height as the first die package; and a cooling element thermally coupled to the first die package and the second die package by a planar surface of the cooling element.

2 . The apparatus of claim 1 , wherein the first die package comprises an application processing unit (APU) die package.

3 . The apparatus of claim 1 , wherein the first die package is bonded to a first substrate and the second die package is bonded to a second substrate.

4 . The apparatus of claim 1 , further comprising a discrete graphics processing unit (dGPU) comprising the second substrate and the second die package.

5 . The apparatus of claim 1 , further comprising:
a first portion of thermal interface material between the first die package and the cooling element; a second portion of thermal interface material between the second die package and the cooling element; and wherein the first portion of thermal interface material and the second portion of thermal interface material are of a substantially same thickness.

6 . The apparatus of claim 5 , wherein the first portion of thermal interface material or the second portion of thermal interface material comprises a thermal paste.

7 . The apparatus of claim 1 , wherein the cooling element comprises a fluid-cooled cooling element.

8 . The apparatus of claim 1 , wherein the planar surface of the cooling element comprises a surface of a layer of conductive metal.

9 . A semiconductor chip device, comprising:
a semiconductor chip substrate; a first die package mounted on the semiconductor chip substrate, the first die package comprising an exposed surface; and a second die package electrically coupled to the semiconductor chip substrate, the second die package having an exposed surface at a same height as the first die package, wherein the exposed surface of the first and second die package are configured to be thermally coupled to a cooling element.

10 . The semiconductor chip device of claim 9 , wherein the first die package comprises an application processing unit (APU) die package.

11 . The semiconductor chip device of claim 9 , wherein the second die package is bonded to a second substrate.

12 . The semiconductor chip device of claim 11 , further comprising a discrete graphics processing unit (dGPU) comprising the second substrate and the second die package.

13 . The semiconductor chip device of claim 9 , wherein:
the exposed surface of the first die package is configured to receive a first portion of thermal interface material between the first die package and the cooling element; the exposed surface of the second die package is configured to receive a second portion of thermal interface material between the second die package and the cooling element; and wherein the first portion of thermal interface material and the second portion of thermal interface material are of a substantially same thickness.

14 . The semiconductor chip device of claim 13 , wherein the first portion of thermal interface material or the second portion of thermal interface material comprises a thermal paste.

15 . A method for a common cooling solution for multiple packages of a common height, comprising:
thermally coupling a planar surface of a cooling element to a first die package; and thermally coupling the planar surface of the cooling element to a second die package having a same height as the first die package.

16 . The method of claim 15 , wherein:
thermally coupling the planar surface of the cooling element to the first die package comprises thermally coupling the planar surface of the cooling element to the first die package via a first portion of thermal interface material; thermally coupling the planar surface of the cooling element to the second die package comprises thermally coupling the planar surface of the cooling element to the second die package via a second portion of thermal interface material; and the first portion of thermal interface material and the second portion of thermal interface material are of a substantially same thickness.

17 . The method of claim 15 , wherein the first die package comprises an application processing unit (APU) die package.

18 . The method of claim 15 , wherein the second die package comprises a discrete graphics processing unit (dGPU) die package.

19 . The method of claim 15 , wherein the cooling element comprises a fluid-cooled cooling element.

20 . The method of claim 15 , wherein the planar surface of the cooling element comprises a surface of a layer of conductive metal.

Assignees

• Advanced Micro Devices Inc

Inventors

• Jaggers Christopher M

Classifications

• H10W40/73

  for cooling by change of state · CPC title

• H10W40/47

  by flowing liquids, e.g. forced water cooling · CPC title

• H10W40/43

  by flowing gases, e.g. forced air cooling · CPC title

• H10W40/22

  characterised by their shape, e.g. having conical or cylindrical projections · CPC title

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title