Transistor manufacturing method and transistor

Patent metadata

Field	Value
Publication number	US-2017309847-A1
Application number	US-201715645208-A
Country	US
Kind code	A1
Filing date	Jul 10, 2017
Priority date	Nov 21, 2013
Publication date	Oct 26, 2017
Grant date	—

Abstract

A transistor manufacturing method includes: forming a first insulator layer of which formation material is a fluorine-containing resin, on a substrate having a source electrode, a drain electrode, and a semiconductor layer so as to cover the semiconductor layer; forming a second insulator layer to cover the first insulator layer; forming a base film on at least part of a surface of the second insulator layer; and after depositing a metal which is an electroless plating catalyst on a surface of the base film, forming a gate electrode on the surface of the base film by electroless plating, wherein the forming of the base film is performed by applying a liquid substance which is a formation material of the base film to the surface of the second insulator layer, and the second insulator layer has a higher lyophilic property with respect to the liquid substance than the first insulator layer.

First claim

What is claimed is:

1 . A transistor manufacturing method comprising:
forming a first insulator layer on a substrate on which a source electrode, a drain electrode, and a semiconductor layer in contact with surfaces of the source electrode and the drain electrode are formed so as to cover the semiconductor layer; forming a second insulator layer so as to cover the first insulator layer; forming a plating base film on at least part of a surface of the second insulator layer; and after depositing a metal which is an electroless plating catalyst on a surface of the plating base film, forming a gate electrode on the surface of the plating base film by electroless plating, wherein the forming of the plating base film is performed by applying a liquid substance which is a formation material of the plating base film to the surface of the second insulator layer, a formation material of the first insulator layer is a resin including no polar group, and the second insulator layer has a higher lyophilic property with respect to the liquid substance than the first insulator layer.

2 . The transistor manufacturing method according to claim 1 , wherein
the polar group is any of a carbonyl group, an amino group, and a hydroxyl group.

3 . The transistor manufacturing method according to claim 1 , wherein
the semiconductor layer is an organic semiconductor layer.

4 . The transistor manufacturing method according to claim 1 , wherein
the forming of the first insulator layer is performed by applying a solution which includes the resin including no polar group and a solvent that dissolves the resin including no polar group, on a surface of the semiconductor layer.

5 . The transistor manufacturing method according to claim 1 , wherein
in the forming of the first insulator layer, the first insulator layer is formed so as to entirely cover an upper surface and a lateral surface of the semiconductor layer.

6 . The transistor manufacturing method according to claim 1 , wherein
the liquid substance includes a silane coupling agent, and the silane coupling agent includes a group having at least one of a nitrogen atom and a sulfur atom.

7 . The transistor manufacturing method according to claim 6 , wherein
the silane coupling agent has an amino group.

8 . The transistor manufacturing method according to claim 7 , wherein
the silane coupling agent is a primary amine or a secondary amine.

9 . The transistor manufacturing method according to claim 1 , wherein
the liquid substance includes a solution in which a resin material is dissolved and a filler that is dispersed in the solution.

10 . The transistor manufacturing method according to claim 1 , wherein
the substrate is made of a non-metallic material.

11 . The transistor manufacturing method according to claim 10 , wherein
the substrate is made of a resin material.

12 . The transistor manufacturing method according to claim 11 , wherein
the substrate has flexibility.

13 . The transistor manufacturing method according to claim 1 , wherein
the source electrode has a first electrode and a second electrode that covers a surface of the first electrode.

14 . The transistor manufacturing method according to claim 13 , wherein
a formation material of the first electrode is nickel phosphorus.

15 . The transistor manufacturing method according to claim 13 , wherein
a formation material of the second electrode is gold.

16 . The transistor manufacturing method according to claim 1 , wherein
the drain electrode has a third electrode and a fourth electrode that covers a surface of the third electrode.

17 . The transistor manufacturing method according to claim 16 , wherein
a formation material of the third electrode is nickel phosphorus.

18 . The transistor manufacturing method according to claim 16 , wherein
a formation material of the fourth electrode is gold.

19 . A transistor comprising:
a substrate on which a source electrode and a drain electrode are formed; a semiconductor layer in contact with surfaces of the source electrode and the drain electrode; a first insulator layer that is provided so as to cover the semiconductor layer; a second insulator layer that is provided so as to cover the first insulator layer; a plating base film that is provided on at least part of a surface of the second insulator layer; and a gate electrode that is provided on a surface of the plating base film, wherein a formation material of the first insulator layer is a resin including no polar group, and the second insulator layer has a higher lyophilic property with respect to an organic solvent than the first insulator layer.

20 . The transistor according to claim 19 , wherein
the polar group is any of a carbonyl group, an amino group, and a hydroxyl group.

21 . The transistor according to claim 19 , wherein
the plating base film includes a silane coupling agent, and the silane coupling agent includes a group having at least one of a nitrogen atom and a sulfur atom.

22 . The transistor according to claim 19 , wherein
the plating base film includes a resin film and a filler that is dispersed in the resin film.

23 . The transistor according to claim 19 , wherein
the semiconductor layer is an organic semiconductor layer.

24 . The transistor according to claim 19 , wherein
the substrate is made of a non-metallic material.

25 . The transistor according to claim 24 , wherein
the substrate is made of a resin material.

26 . The transistor according to claim 25 , wherein
the substrate has flexibility.

27 . The transistor according to claim 19 , wherein
the source electrode has a first electrode and a second electrode that covers a surface of the first electrode.

28 . The transistor according to claim 27 , wherein
a formation material of the first electrode is nickel phosphorus.

29 . The transistor according to claim 27 , wherein
a formation material of the second electrode is gold.

30 . The transistor according to claim 19 , wherein
the drain electrode has a third electrode and a fourth electrode that covers a surface of the third electrode.

31 . The transistor according to claim 30 , wherein
a formation material of the third electrode is nickel phosphorus.

32 . The transistor according to claim 30 , wherein
a formation material of the fourth electrode is gold.

Assignees

• Nikon Corp

Inventors

• Koizumi Shohei
• Sugizaki Takashi
• Kawakami Yusuke

Classifications

• H01L21/823437

  Electricity · mapped topic

• H01L29/4908

  Electricity · mapped topic

• H01L51/0529 Primary

  Electricity · mapped topic

• H01L51/052

  Electricity · mapped topic

• H01L51/0017

  Electricity · mapped topic