Thin film transistor and manufacturing method thereof, array substrate and organic light emitting display panel
US-2016043152-A1 · Feb 11, 2016 · US
US2016190490A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016190490-A1 |
| Application number | US-201514985224-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 30, 2015 |
| Priority date | Dec 31, 2014 |
| Publication date | Jun 30, 2016 |
| Grant date | — |
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An thin film transistor includes an insulating substrate, an MgO layer, a semiconductor carbon nanotube layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is sandwiched between the MgO layer and the functional dielectric layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer. The gate electrode is sandwiched between the insulating substrate and the MgO layer.
Opening claim text (preview).
What is claimed is: 1 . An N-type thin film transistor, comprising: an insulating substrate; a gate electrode on the insulating substrate; an MgO layer on the gate electrode; a semiconductor carbon nanotube layer on the MgO layer, wherein the semiconductor carbon nanotube layer comprises a first surface and a second surface opposite to the first surface, and the first surface is in direct contact with the MgO layer; a functional dielectric layer on the second surface; and a source electrode and a drain electrode electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other. 2 . The N-type thin film transistor of claim 1 , wherein the semiconductor carbon nanotube layer is sandwiched between the MgO layer and the functional dielectric layer. 3 . The N-type thin film transistor of claim 2 , wherein the MgO layer entirely covers the first surface, and the functional dielectric layer entirely covers the second surface. 4 . The N-type thin film transistor of claim 3 , wherein the semiconductor carbon nanotube layer is sealed by the MgO layer and the functional dielectric layer. 5 . The N-type thin film transistor of claim 1 , wherein a thickness of the MgO layer ranges from about 1 nanometer to about 10 nanometers. 6 . The N-type thin film transistor of claim 1 , wherein the semiconductor carbon nanotube layer comprises a plurality of carbon nanotubes. 7 . The N-type thin film transistor of claim 1 , wherein the semiconductor carbon nanotube layer comprises a plurality of semi-conductive carbon nanotubes connected with each other to form a conductive network. 8 . The N-type thin film transistor of claim 7 , wherein a percentage of the plurality of semi-conductive carbon nanotubes in the semiconductor carbon nanotube layer is greater than or equal to 66.7%. 9 . The N-type thin film transistor of claim 1 , wherein the semiconductor carbon nanotube layer consists of a plurality of semi-conductive carbon nanotubes. 10 . The N-type thin film transistor of claim 1 , wherein a thickness of the semiconductor carbon nanotube layer ranges from about 0.5 nanometers to about 2 nanometers. 11 . The N-type thin film transistor of claim 1 , wherein a thickness of the functional dielectric layer ranges from about 20 nanometers to about 40 nanometers. 12 . The N-type thin film transistor of claim 1 , wherein a material of the functional dielectric layer is selected from the group consisting of aluminum oxide, hafnium oxide, and yttrium oxide. 13 . The N-type thin film transistor of claim 11 , wherein the gate electrode is insulated from the semiconductor carbon nanotube layer by the MgO layer. 14 . An N-type thin film transistor, comprising: an insulating substrate; a gate electrode on the insulating substrate; an insulating layer on the gate electrode; an MgO layer on the insulating layer; a semiconductor carbon nanotube layer on the MgO layer, wherein the semiconductor carbon nanotube layer comprises a first surface and a second surface opposite to the first surface, and the first surface is in direct contact with the MgO layer; a functional dielectric layer on the second surface; and a source electrode and a drain electrode electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other. 15 . The N-type thin film transistor of claim 14 , wherein the insulating layer entirely covers a surface of the MgO layer away from the semiconductor carbon nanotube layer. 16 . The N-type thin film transistor of claim 14 , wherein the functional dielectric layer is in direct contact with the second surface and entirely covers the second surface.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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