Organic thin film transistor and method of manufacturing the same, array substrate and display device

Patent metadata

Field	Value
Publication number	US-2016268527-A1
Application number	US-201414769313-A
Country	US
Kind code	A1
Filing date	Nov 14, 2014
Priority date	Aug 20, 2014
Publication date	Sep 15, 2016
Grant date	—

Abstract

An organic thin film transistor and a method of manufacturing the same, an array substrate and a display device are disclosed. The thin film transistor including: a source electrode ( 4 ), a drain electrode ( 5 ), an organic semiconductor layer ( 6 ) disposed on the source electrode ( 4 ) and drain electrode ( 5 ), and a modified layer ( 7 ); the modified layer ( 7 ) is disposed at a position below an organic semiconductor layer ( 6 ) and corresponding to the source electrode ( 4 ) and the drain electrode ( 5 ), covers the source electrode ( 4 ) and the drain electrode ( 5 ), and is configured to change a contact angle on both the source electrode ( 4 ) and the drain electrode ( 5 ). The thin film transistor avoids the problems of poor formation effects and easy disconnection of the organic semiconductor layer ( 6 ) because of the large contact angle on electrode layers, and therefore reduces production costs.

First claim

1 . An organic thin film transistor, comprising: a source electrode, a drain electrode, an organic semiconductor layer disposed on the source electrode and the drain electrode, and a modified layer, wherein:
the modified layer is disposed at a position below the organic semiconductor layer and corresponding to the source electrode and the drain electrode, and the modified layer covers the source electrode and the drain electrode; and the modified layer is configured to change a contact angle on both the source electrode and the drain electrode.

2 . The organic thin film transistor according to claim 1 , further comprising a gate insulating layer, wherein:
the modified layer is also disposed at a position between the organic semiconductor layer and the gate insulating layer; and the modified layer is also configured to change a contact angle on the gate insulating layer.

3 . The organic thin film transistor according to claim 1 , further comprising: a second buffer layer and a gate insulating layer, wherein:
the second buffer layer is disposed at a position below the source electrode and the drain electrode and corresponding to the source electrode and the drain electrode; the second buffer layer is covered by the source electrode and the drain electrode; and an adhesion force of a material of the second buffer layer on the gate insulating layer is greater than that of a material of the source electrode and the drain electrode on the gate insulating layer.

4 . The organic thin film transistor according to claim 3 , further comprising: a gate electrode, and a first buffer layer which are disposed on a base substrate, wherein:
the first buffer layer is disposed at a position below the gate electrode and corresponding to the gate electrode; the first buffer layer is covered by the gate electrode; and an adhesion force of a material of the first buffer layer on the base substrate is greater than that of a material of the gate electrode on the base substrate.

5 . The organic thin film transistor according to claim 3 , wherein the second buffer layer and the first buffer layer independently have a thickness from 20 to 300 nm.

6 . The organic thin film transistor according to claim 1 , wherein the modified layer has a thickness from 0.1 to 10 nm.

7 . The organic thin film transistor according to claim 1 , wherein a material of the source electrode and the drain electrode comprises at least one selected from the group consisting of gold and silver.

8 . The organic thin film transistor according to claim 1 , wherein a material of the modified layer comprises at least one selected from the group consisting of an organic micromolecular material and a self-assembled micromolecular material.

9 . An array substrate, comprising the organic thin film transistor according to claim 1 .

10 . A display device, comprising the organic thin film transistor according to claim 1 .

11 . A method of manufacturing an organic thin film transistor, comprising:
forming a source electrode, a drain electrode and an organic semiconductor layer on the source electrode and the drain electrode, and forming a modified layer at a position on the source electrode and the drain electrode and corresponding to the organic semiconductor layer, wherein the modified layer covers the source electrode and the drain electrode and is configured to change a contact angle on both the source electrode and the drain electrode.

12 . The method according to claim 11 , further comprising:
forming a gate insulating layer, and forming the modified layer at a position between the gate insulating layer and the organic semiconductor layer, wherein the modified layer is also configured to change a contact angle on the gate insulating layer.

13 . The method according to claim 11 , further comprising:
forming a gate insulating layer, and forming a second buffer layer below the source electrode and the drain electrode respectively, the second buffer layer being covered by the source electrode and the drain electrode; wherein an adhesion force of a material of the second buffer layer on the gate insulating layer is greater than that of a material of the source electrode and the drain electrode on the gate insulating layer.

14 . The method according to claim 11 , further comprising:
forming a gate electrode on a base substrate, forming a gate insulating layer, forming a second buffer layer below, the source electrode and the drain electrode, the second buffer layer being covered by, the source electrode and the drain electrode, and forming a first buffer layer below the gate electrode, the first buffer layer being covered by the gate electrode; wherein an adhesion force of a material of the second buffer layer on the gate insulating layer is greater than that of a material of the source electrode and the drain electrode on the gate insulating layer, an adhesion force of a material of the first buffer layer on the base substrate is greater than that of a material of the gate electrode on the base substrate.

15 . The organic thin film transistor according to claim 2 , further comprising: a second buffer layer, wherein:
the second buffer layer is disposed at a position below the source electrode and the drain electrode and corresponding to the source electrode and the drain electrode; the second buffer layer is covered by the source electrode and the drain electrode; and an adhesion force of a material of the second buffer layer on the gate insulating layer is greater than that of a material of the source electrode and the drain electrode on the gate insulating layer.

16 . The organic thin film transistor according to claim 15 , further comprising: a gate electrode and a first buffer layer which are disposed on a base substrate, wherein:
the first buffer layer is disposed at a position below the gate electrode and corresponding to the gate electrode; the first buffer layer is covered by the gate electrode; and an adhesion force of a material of the first buffer layer on the base substrate is greater than that of a material of the gate electrode on the base substrate.

17 . The organic thin film transistor according to claim 4 , wherein the second buffer layer and the first buffer layer independently have a thickness from 20 to 300 nm.

18 . A display device, comprising the array substrate according to claim 9 .

19 . The method according to claim 12 , further comprising:
forming a second buffer layer below the source electrode and the drain electrode respectively, the second buffer layer being covered by the source electrode and the drain electrode; wherein an adhesion force of a material of the second buffer layer on the gate insulating layer is greater than that of a material of the source electrode and the drain electrode on the gate insulating layer.

20 . The method according to claim 12 , further comprising:
forming a gate electrode on a base substrate, forming a second buffer layer below the source electrode and the drain electrode, the second buffer layer being covered by the source electrode and the drain electrode, and forming a first buffer layer below the gate electrode, the first buffer layer being covered by the gate electrode; wherein an adhesion force of a material of the second buffer layer on the gate insulating layer is greater than that of a material of the source electrode and the drain electrode on the gate insulating layer, an adhesion force of a material of the first buffer layer on the base sub

Assignees

• Boe Technology Group Co Ltd

Inventors

• Fong Honhang
• Xie Yingtao
• Ouyang Shihong
• Cai Shucheng
• Shi Qiang
• Liu Ze

Classifications

• H01L51/0545

  Electricity · mapped topic

• H01L51/0529

  Electricity · mapped topic

• H01L51/105 Primary

  Electricity · mapped topic

• H01L51/0018

  Electricity · mapped topic

• H10K71/233 Primary

  by photolithographic etching · CPC title