Power module

Patent metadata

Field	Value
Publication number	US-2016276302-A1
Application number	US-201414777620-A
Country	US
Kind code	A1
Filing date	Mar 25, 2014
Priority date	Mar 29, 2013
Publication date	Sep 22, 2016
Grant date	—

Abstract

A power module is disclosed, including a power module substrate in which a circuit layer is arranged on one surface of an insulating layer; and a semiconductor element that is bonded onto the circuit layer, in which a copper layer composed of copper or a copper alloy is provided on a surface of the circuit layer to be bonded to the semiconductor element, a solder layer formed by using a solder material between the circuit layer and the semiconductor element is provided, an alloy layer containing Sn as a main component, 0.5% by mass or more and 10% by mass or less of Ni, and 30% by mass or more and 40% by mass or less of Cu at an interface of the solder layer with the circuit layer is formed, and the coverage of the alloy layer at the interface is 85% or more.

First claim

1 . A power module, comprising:
a power module substrate in which a circuit layer is arranged on one surface of an insulating layer; and a semiconductor element that is bonded onto the circuit layer, wherein a copper layer composed of copper or a copper alloy is provided on a surface of the circuit layer to be bonded to the semiconductor element, a solder layer formed by using a solder material between the circuit layer and the semiconductor element is provided, an alloy layer containing Sn as a main component, 0.5% by mass or more and 10% by mass or less of Ni, and 30% by mass or more and 40% by mass or less of Cu at an interface of the solder layer with the circuit layer is formed, and the coverage of the alloy layer at the interface is 85% or more.

2 . The power module according to claim 1 ,
wherein a thermal resistance increase rate when a power cycle is loaded 100,000 times under conditions of a conduction duration of 5 seconds and a temperature difference of 80° C. is less than 10% in a power cycle test.

3 . The power module according to claim 1 ,
wherein a thickness of the alloy layer is within a range of 2 μm or more and 20 μm or less.

4 . The power module according to claim 1 ,
wherein the alloy layer includes an intermetallic compound composed of (Cu, Ni) 6 Sn 5 .

5 . The power module according to claim 2 ,
wherein a thickness of the alloy layer is within a range of 2 μM or more and 20 μm or less.

6 . The power module according to claim 2 ,
wherein the alloy layer includes an intermetallic compound composed of (Cu, Ni) 6 Sn 5 .

7 . The power module according to claim 3 ,
wherein the alloy layer includes an intermetallic compound composed of (Cu, Ni) 6 Sn 5 .

8 . The power module according to claim 5 ,
wherein the alloy layer includes an intermetallic compound composed of (Cu, Ni) 6 Sn 5 .

Assignees

• Mitsubishi Materials Corp

Inventors

• Ohashi Toyo
• Nagatomo Yoshiyuki

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title

• H10W72/322

  Multilayered die-attach connectors, e.g. a coating on a top surface of a core · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title