Method for manufacturing silicon wafer and silicon wafer
US-2024304458-A1 · Sep 12, 2024 · US
US2016247694A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016247694-A1 |
| Application number | US-201615052235-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 24, 2016 |
| Priority date | Feb 25, 2015 |
| Publication date | Aug 25, 2016 |
| Grant date | — |
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After determining the size of oxygen precipitates and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; the critical shear stress τ cri at which slip dislocations are formed in the silicon wafer in the device fabrication process is determined based on the obtained size of the oxygen precipitates and residual oxygen concentration; and the obtained critical shear stress τ cri and the thermal stress τ applied to the silicon wafer in the heat treatment of the device fabrication process are compared, thereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress τ is equal to or more than the critical shear stress τ cri , or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress τ is less than the critical shear stress τ cri .
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1 . A quality evaluation method for a silicon wafer, comprising the steps of: determining the size of oxygen precipitates and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; subsequently determining the critical shear stress τ cri at which slip dislocations are formed in the silicon wafer in the device fabrication process based on the obtained size of the oxygen precipitates and residual oxygen concentration; and comparing the obtained critical shear stress τ cri and the thermal stress τ applied to the silicon wafer in the heat treatment of the device fabrication process, whereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress τ is equal to or more than the critical shear stress τ cri , or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress τ is less than the critical shear stress τ cri . 2 . The quality evaluation method for a silicon wafer, according to claim 1 , wherein the critical shear stress τ cri is given by Equation (A) below, where L: the size of the oxygen precipitate, C O : the residual oxygen concentration, T: the temperature of the heat treatment, G: the modulus of rigidity, b: the Burgers vector of the slip dislocations, and k: the Boltzmann constant. τ cri =0.16×( G·b/L )+6.8×10 −5 ×C O ×exp(0.91 eV/kT) (A) 3 . The quality evaluation method for a silicon wafer, according to claim 1 , wherein the step of determining the size L of the oxygen precipitates and the residual oxygen concentration C O after heat treatment in the device fabrication process is performed by measuring the size of the oxygen precipitate and the residual oxygen concentration in the silicon wafer after the heat treatment performed on the silicon wafer in the device fabrication process. 4 . The quality evaluation method for a silicon wafer, according to claim 1 , wherein the step of determining the size L of the oxygen precipitates and the residual oxygen concentration C O after the heat treatment in the device fabrication process is performed by simulation calculation. 5 . The quality evaluation method for a silicon wafer, according to claim 1 , wherein the thermal stress τ is estimated based on the temperature distribution in the radial direction of the silicon wafer having been heated by being loaded into a heat treatment unit. 6 . The quality evaluation method for a silicon wafer, according to claim 1 , wherein the thermal stress τ is estimated by simulation calculations. 7 . A method of producing a silicon wafer, comprising the steps of: growing a single crystal silicon ingot under the growing conditions allowing a silicon wafer to be obtained, which wafer is determined to have no slip dislocations formed in a device fabrication process by the quality evaluation method for a silicon wafer, according to claim 1 ; and subjecting the grown single crystal silicon ingot to a wafer processing process. 8 . A method of producing a silicon wafer, comprising the steps of: growing a single crystal silicon ingot under the growing conditions allowing a silicon wafer to be obtained, which wafer is determined to have no slip dislocations formed in a device fabrication process by the quality evaluation method for a silicon wafer, according to claim 2 , and subjecting the grown single crystal silicon ingot to a wafer processing process. 9 . The method of producing a silicon wafer, according to claim 7 , wherein the size of the oxygen precipitates after heat treatment in the device fabrication process is 10 nm or more and 150 nm or less. 10 . The method of producing a silicon wafer, according to claim 8 , wherein the size of the oxygen precipitates after heat treatment in the device fabrication process is 10 nm or more and 150 nm or less. 11 . The method of producing a silicon wafer, according to claim 7 , wherein the residual oxygen concentration after heat treatment in the device fabrication process is 10×10 17 atoms/cm 3 or more and 18×10 17 atoms/cm 3 or less. 12 . The method of producing a silicon wafer, according to claim 8 , wherein the residual oxygen concentration after heat treatment in the device fabrication process is 10×10 17 atoms/cm 3 or more and 18×10 17 atoms/cm 3 or less. 13 . A silicon wafer having a size of oxygen precipitates and a residual oxygen concentration, at which the thermal stress τ obtained in a device fabrication process is lower than the critical shear stress τ cri at which slip dislocations are formed in the device fabrication process. 14 . The silicon wafer according to claim 13 , wherein the size of the oxygen precipitates after heat treatment in the device fabrication process is 10 nm or more and 150 nm or less. 15 . The silicon wafer according to claim 13 , wherein the residual oxygen concentration after heat treatment in the device fabrication process is 10×10 17 atoms/cm 3 or more and 18×10 17 atoms/cm 3 or less. 16 . The silicon wafer according to claim 14 , wherein the residual oxygen concentration after heat treatment in the device fabrication process is 10×10 17 atoms/cm 3 or more and 18×10 17 atoms/cm 3 or less.
Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title
characterised by multiple measurements, corrections, marking or sorting processes · CPC title
Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body · CPC title
being Group IV materials, e.g. B-doped Si or undoped Ge · CPC title
the imperfections being within the semiconductor body · CPC title
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