Circuit layout, layout method and system for implementing the method

Patent metadata

Field	Value
Publication number	US-2016126232-A1
Application number	US-201414527381-A
Country	US
Kind code	A1
Filing date	Oct 29, 2014
Priority date	Oct 29, 2014
Publication date	May 5, 2016
Grant date	—

Abstract

A circuit layout includes a first device having a first set of fingers, wherein the first set of fingers is separated into a first finger group and a second finger group, the first finger group comprising a first number of fingers, and the second finger group comprising a second number of fingers. The circuit layout further includes a second device having a second set of fingers, wherein the second set of fingers includes a third finger group having a third number of fingers. The first finger group, the second finger group and the third finger group extend across a first doped region, and the third finger group is between the first finger group and the second finger group.

First claim

What is claimed is:

1 . A circuit layout comprising:
a first device comprising a first set of fingers, wherein the first set of fingers includes a first finger group and a second finger group, the first finger group comprising a first number of fingers, and the second finger group comprising a second number of fingers; and a second device comprising a second set of fingers, wherein the second set of fingers includes a third finger group having a third number of fingers, wherein the first finger group, the second finger group and the third finger group extend across a first doped region, and the third finger group is between the first finger group and the second finger group.

2 . The circuit layout of claim 1 , wherein the first number of fingers is equal to the second number of fingers.

3 . The circuit layout of claim 1 , wherein the first number of fingers is different from the third number of fingers.

4 . The circuit layout of claim 1 , wherein the second set of fingers includes a fourth finger group having a fourth number of fingers, and the second finger group is between the third finger group and the fourth finger group.

5 . The circuit layout of claim 1 , wherein the first doped region has a first dopant type, and the first finger group, the second finger group and the third finger group extend across a second doped region having a second dopant type different from the first dopant type.

6 . The circuit layout of claim 1 , further comprising at least one additional device having a plurality of additional finger groups,
wherein a first additional finger group of the plurality of additional finger groups and a second additional finger group of the plurality of additional finger groups extend across the first doped region, and at least one of the first finger group, the second finger group or the third finger group is between the first additional finger group and the second additional finger group.

7 . The circuit layout of claim 6 , wherein the second device further comprises a fourth finger group extending across a second doped region, and a third additional finger group of the plurality of additional finger groups extends across the second doped region, and the second doped region has a same dopant type of as the first doped region and is discontinuous with the first doped region.

8 . The circuit layout of claim 1 , wherein the second device further comprises a fourth finger group extending across a second doped region, and the second doped region has a same dopant type of as the first doped region and is discontinuous with the first doped region.

9 . The circuit layout of claim 1 , wherein fingers in the first finger group are electrically connected to fingers in the second finger group.

10 . The circuit layout of claim 1 , further comprising a third device having a third set of fingers, wherein the third set of fingers includes a fourth finger group having a fourth number of fingers, the fourth finger group extends across the first doped region, and the fourth finger group is between the first finger group and the second finger group.

11 . A circuit layout comprising:
a first device comprising a first set of fingers, wherein the first set of fingers includes a first finger group and a second finger group, and the first finger group and the second finger group extend across a first doped region having a first dopant type, and the first finger group is electrically connected to the second finger group; a second device comprising a second set of fingers, wherein the second set of fingers includes a third finger group and a fourth finger group, and the third finger group and the fourth finger group extend across a second doped region having a second dopant type different from the first dopant type, and the third group of fingers is electrically connected to the fourth group of fingers; a third device comprising a fifth finger group, wherein the fifth finger group is between the first finger group and the second finger group; and a fourth device comprising a sixth finger group, wherein the sixth finger group is between the third finger group and the fourth finger group.

12 . The circuit layout of claim 11 , wherein the each finger of the first set of fingers is electrically connected to a corresponding finger of the second set of fingers.

13 . The circuit layout of claim 11 , wherein each finger of the fifth finger group is electrically connected to a corresponding finger of the sixth finger group.

14 . The circuit layout of claim 11 , wherein a number of fingers in the first finger group is different from a number of fingers in the second finger group.

15 . The circuit layout of claim 11 , wherein a number of fingers in the fifth finger group is different from at least one of a number of fingers in the first finger group or a number of fingers in the second finger group.

16 . The circuit layout of claim 11 , wherein a number of fingers in the first finger group is equal to a number of fingers in the second finger group.

17 . The circuit layout of claim 11 , wherein a number of fingers in the fifth finger group is equal to at least one of a number of fingers in the first finger group or a number of fingers in the second finger group.

18 . A circuit layout comprising:
a first device comprising a first set of fingers, wherein the first set of fingers includes a first finger group and a second finger group, wherein the first finger group extend across a first doped region, wherein the first doped region having a first dopant type, and
the second finger group extend across a second doped region, wherein the second doped region has the first dopant type, and the second doped region is physically spaced from the first doped region.

19 . The circuit layout of claim 18 , further comprising a second device having a plurality of additional finger groups,
wherein the first finger group of the first device is located between a first additional finger group of the plurality of additional finger groups and a second additional finger group of the plurality of additional finger groups.

20 . The circuit layout of claim 19 , wherein at least one finger group of the plurality of additional finger groups extends across the second doped region.

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Liu Shou-En
• Chang Chun-Wei
• Lin Bi-Ling
• Tsai Yung-Sheng
• Shih Jiaw-Ren

Classifications

• H10D84/853

  comprising FinFETs · CPC title

• H10D84/834

  comprising FinFETs · CPC title

• H10D89/10

  Integrated device layouts · CPC title

• H10D89/00

  Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00 · CPC title

• H10D84/85

  Complementary IGFETs, e.g. CMOS · CPC title