Push-pull rf power amplifier circuit and push-pull rf power amplifier
US-2024429886-A1 · Dec 26, 2024 · US
US2016248389A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016248389-A1 |
| Application number | US-201615043556-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 13, 2016 |
| Priority date | Feb 15, 2015 |
| Publication date | Aug 25, 2016 |
| Grant date | — |
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Power amplifier having staggered cascode layout for enhanced thermal ruggedness. In some embodiments, a radio-frequency (RF) amplifier such as a power amplifier (PA) can be configured to receive and amplify an RF signal. The PA can include an array of cascoded devices connected electrically parallel between an input node and an output node. Each cascoded device can include a common emitter transistor and a common base transistor arranged in a cascode configuration. The array can be configured such that the common base transistors are positioned in a staggered orientation relative to each other.
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What is claimed is: 1 . A radio-frequency (RF) amplifier comprising: an input node and an output node configured to receive an RF signal and provide an amplified RF signal, respectively; and an array of cascoded devices implemented between the input node and the output node to generate the amplified RF signal, each cascoded device including a common emitter transistor and a common base transistor arranged in a cascode configuration, the array configured such that the common base transistors are positioned in a staggered orientation relative to each other. 2 . The RF amplifier of claim 1 wherein the staggered orientation of the common base transistors provide an increase in a nearest pair spacing, when compared to a non-staggered orientation. 3 . The RF amplifier of claim 2 wherein the common base transistor is configured to handle more power than the common emitter transistor. 4 . The RF amplifier of claim 3 wherein the increased spacing results in a smaller rise in temperature due to the operation of the RF amplifier, when compared to the non-staggered orientation. 5 . The RF amplifier of claim 4 wherein the rise in temperature resulting from the staggered orientation is less than half of the rise in temperature resulting from the non-staggered orientation. 6 . The RF amplifier of claim 1 wherein the cascoded devices are electrically connected in parallel such that each of the input node and the output node is a respective common node for the cascoded devices. 7 . The RF amplifier of claim 1 wherein the array of cascoded devices includes a plurality of cascoded devices arranged in the staggered orientation in a first row. 8 . The RF amplifier of claim 7 wherein the plurality of cascoded devices in the first row are electrically connected in parallel. 9 . The RF amplifier of claim 8 wherein the plurality of cascoded devices in the first row are coupled to a common input and a common output. 10 . The RF amplifier of claim 7 wherein the array of cascoded devices further includes a plurality of cascoded devices arranged in the staggered orientation in a second row. 11 . The RF amplifier of claim 10 wherein the staggered arrangement of cascoded devices in the first row and the staggered arrangement of cascoded devices in the second row are offset to avoid direct row-to-row adjacent pair of common base transistors. 12 . The RF amplifier of claim 11 wherein the plurality of cascoded devices in each row are coupled to a common input and a common output. 13 . The RF amplifier of claim 1 wherein each cascoded device is configured such that a base of the common emitter transistor is coupled to the input node, a collector of the common emitter transistor is coupled to an emitter of the common base transistor, and a collector of the common base transistor is coupled to the output node. 14 . The RF amplifier of claim 13 wherein a base of the common base transistor is coupled to an emitter of the common emitter transistor through a bypass capacitance. 15 . The RF amplifier of claim 1 wherein the RF amplifier is a power amplifier (PA). 16 . The RF amplifier of claim 15 wherein the PA is configured to operate with a high-voltage supply. 17 . A semiconductor die comprising: a substrate; and a power amplifier (PA) implemented on the substrate and configured to receive and amplify a radio-frequency (RF) signal, the PA including an array of cascoded devices implemented between an input node and an output node, each cascoded device including a common emitter transistor and a common base transistor arranged in a cascode configuration, the array configured such that the common base transistors are positioned in a staggered orientation relative to each other. 18 . A radio-frequency (RF) module comprising: a packaging substrate configured to receive a plurality of components; and a power amplification system implemented on the packaging substrate, the power amplification system including a power amplifier (PA) configured to receive and amplify a radio-frequency (RF) signal, the PA including an input node and an output node configured to facilitate the amplification of the RF signal, the PA further including an array of cascoded devices implemented between the input node and the output node, each cascoded device including a common emitter transistor and a common base transistor arranged in a cascode configuration, the array configured such that the common base transistors are positioned in a staggered orientation relative to each other. 19 . The RF module of claim 18 wherein the RF module is a power amplifier module. 20 . The RF module of claim 18 wherein the RF module is a front-end module.
adapted for thermal considerations · CPC title
using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title
using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title
in integrated circuits · CPC title
Modifications of input or output impedances, not otherwise provided for · CPC title
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