Integrated Circuit Device with Adaptations for Multiplexed Biosensing

Patent metadata

Field	Value
Publication number	US-2016334362-A1
Application number	US-201514713543-A
Country	US
Kind code	A1
Filing date	May 15, 2015
Priority date	May 15, 2015
Publication date	Nov 17, 2016
Grant date	—

Abstract

A device layer of an integrated circuit device includes a semiconductor active layer spanning a plurality of device regions. Each of the device regions has a heating element, a temperature sensor, and bioFETs in the device layer. The bioFETs have source/drain regions and channel regions in the semiconductor active layer and fluid gates exposed on a surface for fluid interfacing on one side of the device layer. A multilayer metal interconnect structure is disposed on the opposite side of the device layer. This structure places the heating elements in proximity to the fluid gates enabling localized heating, precision heating, and multiplexed temperature control for multiplexed bio-sensing applications.

First claim

1 . An integrated circuit device, comprising:
a plurality of device regions; a device layer having a front side, a back side, and a semiconductor active layer spanning the plurality of device regions; and a multilayer metal interconnect structure formed on the front side of the device layer; wherein the device regions each comprise:
one or more heating elements in the device layer;
one or more temperature sensors in the device layer; and
one or more field effect transistors in the device layer, the field effect transistors having source/drain regions and channel regions in the semiconductor active layer and fluid gates exposed on a surface for fluid interfacing on the back side of the device layer.

2 . An integrated circuit device according to claim 1 , wherein each of the device regions comprises an array of the field effect transistors.

3 . An integrated circuit device according to claim 1 , wherein the heating elements are configured to be controlled independently among the plurality of device regions.

4 . An integrated circuit device according to claim 1 , wherein the heating elements are disposed between the semiconductor active layer and the multilayer metal interconnect structure.

5 . An integrated circuit device according to claim 1 , wherein the heating elements are disposed within the semiconductor active layer.

6 . An integrated circuit device according to claim 1 , further comprising:
one or more manipulation electrodes exposed on the back side of the device layer adjacent to the fluid gates.

7 . An integrated circuit device according to claim 1 , further comprising:
one or more manipulation electrodes covered by a dielectric on the back side of the device layer adjacent to the fluid gates.

8 . An integrated circuit device according to claim 1 , further comprising:
one or more manipulation electrodes on the back side of the device layer; a plurality of contacts for interfacing with an external device comprising:
a first contact through which a voltage can be supplied to at least some of the manipulation electrodes;
wherein the device is not configured to supply voltage from the first contact to any electrodes of the field effect transistors.

9 . An integrated circuit device according to claim 1 , wherein the field effect transistors each comprise a second gate having a second gate electrode located on an opposite side of the semiconductor active layer from the fluid gates.

10 . An integrated circuit device according to claim 1 , wherein the temperature sensors of the plurality of device regions each comprise at least one P-N junction arranged in the semiconductor active layer.

11 . An integrated circuit device according to claim 10 , wherein:
the source/drain regions have a doping profile through the semiconductor active layer; the at least one P-N junction of the temperature sensors are formed by adjacent regions of the semiconductor active layer having doping profiles and differing conductivity types; wherein a conductivity type and doping profile of one of the adjacent regions forming the P-N junctions of the temperature sensors is the same as that of the source/drain regions.

12 . An integrated circuit device according to claim 1 , wherein the heating elements, the temperature sensors, and the field effect transistors are electrically connected to the multilayer metal interconnect structure.

13 . An integrated circuit device according to claim 1 , wherein the exposed surfaces of the fluid gates in a first of the device regions has a composition not found on the exposed surfaces of any of the fluid gates in a second of the device regions.

14 . An integrated circuit device according to claim 13 , wherein the composition comprises a selective binding agent.

15 . An integrated circuit device, comprising:
an array of bioFETs having a first side and a second side opposite the first side, the bioFETs comprising a fluid gate dielectric; a multilayer metal interconnect structure formed on the second side; heaters located between the multilayer metal interconnect structure and the first side; temperature sensors located between the multilayer metal interconnect structure and the first side; wherein fluid gate dielectric is exposed for fluid contacting on the first side; and the bioFETs, the heaters, and the temperature sensors electrically interface with the multilayer metal interconnect structure.

16 - 20 . (canceled)

21 . An integrated circuit, comprising:
a device layer comprising a semiconductor active layer having a semiconductor material; a temperature sensor arranged within the semiconductor active layer; a heating element arranged within the device layer; and a field effect transistor, comprising:
source/drain regions disposed within the semiconductor active layer;
a gate dielectric layer arranged along a first side of the semiconductor active layer;
a gate electrode separated from the first side of the semiconductor active layer by the gate dielectric layer; and
a fluid gate dielectric layer disposed along a second side of the semiconductor active layer opposing the first side of the semiconductor active layer.

22 . The integrated circuit of claim 21 , wherein the temperature sensor comprises a first region within the semiconductor active layer having a first doping type and a second region within the semiconductor active layer having a second doping type different than the first doping type.

23 . The integrated circuit of claim 21 ,
wherein the heating element comprises a conductive layer arranged along the first side of the semiconductor active layer; and wherein the heating element is laterally separated from the gate electrode by an inter-level dielectric layer.

24 . The integrated circuit of claim 21 , further comprising:
a multilayer metal interconnect structure arranged within a dielectric structure disposed along the first side of the semiconductor active layer.

25 . The integrated circuit of claim 21 , further comprising:
an isolation dielectric layer arranged along the second side of the semiconductor active layer over the source/drain regions and laterally contacting the fluid gate dielectric layer; and a passivation layer arranged over the isolation dielectric layer and having an opening exposing the fluid gate dielectric layer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Liu Yi-Shao
• Huang Jui-Cheng
• Chen Tung-Tsun

Classifications

• H10W40/10

  Arrangements for heating · CPC title

• G01N27/4148 Primary

  Integrated circuits therefor, e.g. fabricated by CMOS processing · CPC title

• G01N27/4145 Primary

  specially adapted for biomolecules, e.g. gate electrode with immobilised receptors · CPC title

• H10D89/105

  adapted for thermal considerations · CPC title

• H10D84/82

  of only field-effect components · CPC title