Semiconductor device including conductive structure and method for manufacturing the same

US12598984B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12598984-B2
Application numberUS-202217893770-A
CountryUS
Kind codeB2
Filing dateAug 23, 2022
Priority dateDec 2, 2021
Publication dateApr 7, 2026
Grant dateApr 7, 2026

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device including an insulating structure, and a conductive structure in the insulating structure may be provided. The conductive structure includes a barrier layer, an anti-migration layer on the barrier layer, a liner on the anti-migration layer, a conductive layer on the liner, and a capping layer covering a top surface of the barrier layer and a top surface of the anti-migration layer. The capping layer and the liner include Co. The anti-migration layer includes Mn.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: an insulating structure; and a conductive structure in the insulating structure, wherein the conductive structure comprises, a barrier layer, an anti-migration layer on the barrier layer, a liner on the anti-migration layer, a conductive layer on the liner, and a capping layer covering a top surface of the barrier layer and a top surface of the anti-migration layer, wherein the capping layer and the liner comprise Co, and wherein the anti-migration layer comprises Mn; wherein an upper portion of the anti-migration layer is between the capping layer and the liner. 2 . The semiconductor device according to claim 1 , wherein a thickness of the liner is smaller than a thickness of the capping layer. 3 . The semiconductor device according to claim 1 , wherein the anti-migration layer comprises an upper portion covering a top surface of the liner and a top surface of the conductive layer, and a lower portion covering an outer sidewall and a bottom surface of the liner. 4 . The semiconductor device according to claim 1 , wherein: the barrier layer comprises a first barrier portion and a second barrier portion on the first barrier portion; the first barrier portion comprises TaN; and the second barrier portion comprises Ta. 5 . The semiconductor device according to claim 1 , wherein the liner comprises an upper portion covering a top surface of the conductive layer, and a lower portion covering an outer sidewall and a bottom surface of the conductive layer. 6 . The semiconductor device according to claim 1 , wherein: the conductive layer comprises a first conductive portion, and a second conductive portion in the first conductive portion; the first conductive portion comprises a CuMn alloy; and the second conductive portion comprises Cu. 7 . A semiconductor device comprising: an insulating structure; and a conductive structure in the insulating structure, wherein the conductive structure comprises, a conductive layer, a liner covering an outer sidewall of the conductive layer, an anti-migration layer covering an outer sidewall of the liner, a barrier layer covering an outer sidewall of the anti-migration layer, and a capping layer covering a top surface of the anti-migration layer and a top surface of the barrier layer, wherein an upper portion of the anti-migration layer comprises a bottom surface contacting a top surface of the liner. 8 . The semiconductor device according to claim 7 , wherein: the liner and the capping layer comprise Co doped with an impurity; and the impurity is at least one of N, P, W, or B. 9 . The semiconductor device according to claim 7 , wherein the bottom surface of the upper portion of the anti-migration layer contacts a top surface of the conductive layer. 10 . The semiconductor device according to claim 7 , wherein: a maximum width in a horizontal direction of the capping layer is substantially equal to a distance in the horizontal direction between an uppermost portion of a first outer sidewall of the barrier layer and an uppermost portion of a second outer sidewall of the barrier layer; and the first outer sidewall and the second outer sidewall of the barrier layer oppose each other. 11 . The semiconductor device according to claim 7 , wherein an upper portion of the liner comprises a top surface contacting the bottom surface of the upper portion of the anti-migration layer, and a bottom surface contacting a top surface of the conductive layer. 12 . The semiconductor device according to claim 7 , wherein: the capping layer and the liner comprise a same conductive material; and the capping layer and the liner are spaced apart from each other with the upper portion of the anti-migration layer therebetween. 13 . The semiconductor device according to claim 7 , wherein the barrier layer comprises TaN. 14 . A semiconductor device comprising: an insulating structure; and a conductive structure in the insulating structure, wherein the conductive structure comprises, a barrier layer, an anti-migration layer on the barrier layer, a liner on the anti-migration layer, a conductive layer on the liner, and a capping layer covering a top surface of the barrier layer and a top surface of the anti-migration layer, wherein a first sidewall of the capping layer is connected to a first outer sidewall of the barrier layer, wherein a second side wall of the capping layer is connected to a second outer sidewall of the barrier layer, wherein the liner is spaced apart from the capping layer, and wherein the liner and the capping layer comprise Co. 15 . The semiconductor device according to claim 14 , wherein the first and second sidewalls of the capping layer are curved. 16 . The semiconductor device according to claim 14 , wherein: the first sidewall of the capping layer contacts an uppermost portion of the first outer sidewall of the barrier layer; and the second sidewall of the capping layer contacts an uppermost portion of the second outer sidewall of the barrier layer. 17 . The semiconductor device according to claim 14 , wherein an upper portion of the anti-migration layer is between the capping layer and the liner. 18 . The semiconductor device according to claim 14 , wherein, in a cross-sectional view, the anti-migration layer surrounds the conductive layer and the liner.

Assignees

Inventors

Classifications

  • Insulating materials thereof · CPC title

  • the barrier, adhesion or liner layers being on top of a main fill metal · CPC title

  • also covering sidewalls of the conductive structures · CPC title

  • the conductive layers comprising transition metals · CPC title

  • comprising multiple barrier, adhesion or liner layers · CPC title

Patent family

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Frequently asked questions

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What does patent US12598984B2 cover?
A semiconductor device including an insulating structure, and a conductive structure in the insulating structure may be provided. The conductive structure includes a barrier layer, an anti-migration layer on the barrier layer, a liner on the anti-migration layer, a conductive layer on the liner, and a capping layer covering a top surface of the barrier layer and a top surface of the anti-migrat…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/44. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 07 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).