Integration of a self-forming barrier layer and a ruthenium metal liner in copper metallization

Patent metadata

Field	Value
Publication number	US-10157784-B2
Application number	US-201715428749-A
Country	US
Kind code	B2
Filing date	Feb 9, 2017
Priority date	Feb 12, 2016
Publication date	Dec 18, 2018
Grant date	Dec 18, 2018

Abstract

Methods for integration of conformal barrier layers and Ru metal liners with Cu metallization in semiconductor manufacturing are described in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a barrier layer in the recessed feature, depositing a Ru metal liner on the barrier layer, and exposing the substrate to an oxidation source gas to oxidize the barrier layer through the Ru metal liner. The method further includes filling the recessed feature with CuMn metal using an ionized physical vapor deposition (IPVD) process, heat-treating the substrate to diffuse Mn from the CuMn metal to the oxidized barrier layer, and reacting the diffused Mn with the oxidized barrier layer to form a Mn-containing diffusion barrier.

First claim

What is claimed is:

1. A method for forming a semiconductor device, the method comprising
providing a substrate containing a recessed feature;
depositing a barrier layer in the recessed feature;
depositing a Ru metal liner on the barrier layer, wherein the barrier layer contains TaN or TaAlN;
exposing the substrate to an oxidation source gas to oxidize the barrier layer through the Ru metal liner;
filling the recessed feature with CuMn metal using an ionized physical vapor deposition (IPVD) process;
heat-treating the substrate to diffuse Mn from the CuMn metal to the oxidized barrier layer; and
reacting the diffused Mn with the oxidized barrier layer to form a Mn-containing diffusion barrier.

2. The method of claim 1 , further comprising
after depositing the Ru metal liner and before filling the recessed feature, heat-treating the substrate in an inert atmosphere.

3. The method of claim 1 , further comprising after depositing the Ru metal liner and before filling the recessed feature, exposing the substrate to plasma-excited H 2 gas.

4. The method of claim 1 , further comprising
prior to the heat-treating, plating Cu metal on the CuMn metal;
removing excess plated Cu metal and CuMn metal by chemical mechanical polishing (CMP) from above the recessed feature; and
depositing a nitride cap layer.

5. The method of claim 1 , wherein exposing the substrate to an oxidation source gas includes exposing the substrate to air.

6. The method of claim 1 , wherein exposing the substrate to an oxidation source gas includes exposing the substrate to oxygen (O 2 ), water (H 2 O), or a combination thereof.

7. The method of claim 1 , wherein the Ru metal liner is deposited by chemical vapor deposition (CVD) using a Ru 3 (CO) 12 precursor and CO as a carrier gas.

8. A method for forming a semiconductor device, the method comprising:
processing a substrate in a low-vacuum processing tool by
providing a substrate containing a recessed feature;
depositing a barrier layer in the recessed feature, wherein the barrier layer contains TaN or TaAlN; and
depositing a Ru metal liner on the barrier layer;

removing the substrate from the low-vacuum processing tool;
exposing the substrate to an oxidation source gas to oxidize the barrier layer through the Ru metal liner; and
processing the substrate in a high-vacuum processing tool by filling the recessed feature with CuMn metal using an ionized physical vapor deposition (IPVD) process.

9. The method of claim 8 , further comprising:
heat-treating the substrate to diffuse Mn from the CuMn metal to the oxidized barrier layer; and
reacting the diffused Mn with the oxidized barrier layer to form a Mn-containing diffusion barrier.

10. The method of claim 8 , further comprising
after depositing the Ru metal liner and before filling the recessed feature, heat-treating the substrate in an inert atmosphere.

11. The method of claim 8 , further comprising
after depositing the Ru metal liner and before filling the recessed feature, exposing the substrate to plasma-excited H 2 .

12. The method of claim 9 , further comprising
prior to the heat-treating, plating Cu metal on the CuMn metal;
removing excess plated Cu metal and CuMn metal from above the recessed feature; and
depositing a nitride cap layer.

13. The method of claim 8 , wherein exposing the substrate to an oxidation source gas includes exposing the substrate to air.

14. The method of claim 8 , wherein exposing the substrate to an oxidation source gas includes exposing the substrate to oxygen (O 2 ), water (H 2 O), or a combination thereof.

15. The method of claim 8 , wherein the Ru metal liner is deposited by chemical vapor deposition (CVD) using a Ru 3 (CO) 12 precursor and CO as a carrier gas.

16. A method for forming a semiconductor device, the method comprising providing a substrate containing a recessed feature;
depositing a TaN or TaAlN barrier layer in the recessed feature;
depositing a Ru metal liner on the barrier layer, the Ru metal liner having a thickness between about 0.3 nm and about 2 nm;
exposing the substrate to an oxidation source gas containing oxygen (O 2 ), water (H 2 O), or a combination thereof, to oxidize the barrier layer through the Ru metal liner;
filling the recessed feature with CuMn metal using an ionized physical vapor deposition (IPVD) process and a CuMn sputtering target with between about 1 and about 20 atomic % Mn;
heat-treating the substrate to diffuse Mn from the CuMn metal through the Ru metal liner to the oxidized barrier layer; and
reacting the diffused Mn with the oxidized barrier layer to form a Mn-containing diffusion barrier.

17. The method of claim 16 , wherein the heat-treating is performed at a temperature between about 350° C. and about 400° C.

18. The method of claim 16 , further comprising
after depositing the Ru metal liner and before filling the recessed feature, heat-treating the substrate in an inert atmosphere.

Assignees

• Tokyo Electron Ltd

Inventors

• Yu Kai-Hung
• Oie Manabu
• Maekawa Kaoru
• Wajda Cory
• Leusink Gerrit J
• Kikuchi Yuuki
• Kawasaki Hiroaki
• Nagai Hiroyuki

Classifications

• H10W20/0552

  by diffusing metallic dopants to react with dielectrics · CPC title

• H10P14/432

  using selective deposition · CPC title

• H10P14/43

  Chemical deposition, e.g. chemical vapour deposition [CVD] · CPC title

• H10P14/44

  Physical vapour deposition [PVD] · CPC title

• H10W20/057

  by selectively depositing, e.g. by using selective CVD or plating · CPC title