Structure for capacitor having defect-preventing regions in metal electrode

Patent metadata

Field	Value
Publication number	US-12550723-B2
Application number	US-202217816493-A
Country	US
Kind code	B2
Filing date	Aug 1, 2022
Priority date	Aug 1, 2022
Publication date	Feb 10, 2026
Grant date	Feb 10, 2026

Abstract

A structure for a capacitor is provided. The structure includes a first metal electrode, such as a copper electrode, having at least one dielectric region, such as a dielectric, therein. A first dielectric layer is on the first metal electrode, and a second metal electrode is on the first dielectric layer. At least one via is on the second metal electrode. Each via is over the at least one dielectric region in the first metal electrode.

First claim

What is claimed is:

1 . A structure comprising:
a first metal electrode; at least one dielectric region in the first metal electrode; a first dielectric layer on the first metal electrode; a second metal electrode on the first dielectric layer, wherein the second metal electrode includes a plurality of digitated elements over the first dielectric layer; at least one via on the second metal electrode, each of the at least one via is over the at least one dielectric region in the first metal electrode; a second dielectric layer on the second metal electrode; and a third metal electrode on the second dielectric layer and extending horizontally over at least two of the plurality of digitated elements of the second metal electrode.

2 . The structure of claim 1 , wherein the first metal electrode includes copper (Cu).

3 . The structure of claim 1 , wherein the at least one dielectric region includes an oxide.

4 . The structure of claim 1 , wherein the at least one via is vertically aligned over the at least one dielectric region in the first metal electrode.

5 . The structure of claim 1 , wherein the first metal electrode includes copper (Cu), and the second metal electrode and the third metal electrode include tantalum (Ta).

6 . The structure of claim 1 , wherein the first dielectric layer and the second dielectric layer include a nitride.

7 . The structure of claim 1 , wherein the at least one dielectric region has a horizontal cross-sectional size sufficient to be under more than one of the at least one via.

8 . The structure of claim 1 , wherein the first metal electrode is positioned in a last metal layer of a device.

9 . The structure of claim 1 , further comprising a plurality of additional vias on the third metal electrode, wherein each of the plurality of additional vias is vertically aligned with a gap between the plurality of digitated elements of the second metal electrode.

10 . A capacitor structure, comprising:
a copper electrode; at least one oxide region in the copper electrode; a first dielectric layer on the copper electrode; a first metal electrode on the first dielectric layer; a second metal electrode on the first dielectric layer, wherein the second metal electrode includes a plurality of digitated elements over the first dielectric layer; at least one via on the first metal electrode, wherein the at least one via is over the at least one oxide region in the copper electrode; a second dielectric layer on the second metal electrode; and a third metal electrode on the second dielectric layer and extending horizontally over at least two of the plurality of digitated elements of the second metal electrode.

11 . The capacitor structure of claim 10 , wherein the at least one via is vertically aligned over the at least one oxide region in the copper electrode.

12 . The capacitor structure of claim 10 , wherein the first metal electrode and the second metal electrode include tantalum (Ta).

13 . The capacitor structure of claim 10 , wherein the at least one oxide region has a horizontal cross-sectional size sufficient to be under more than one of the at least one via.

14 . The capacitor structure of claim 10 , wherein the copper electrode is positioned in a last metal layer of a device.

15 . The structure of claim 10 , further comprising a plurality of additional vias on the third metal electrode, wherein each of the plurality of additional vias is vertically aligned with a gap between the plurality of digitated elements of the second metal electrode.

16 . A method comprising:
forming a copper electrode over a substrate, the copper electrode having at least one oxide region interspersed therewithin; forming a first dielectric layer on the copper electrode; forming a first metal electrode on the first dielectric layer; forming a second metal electrode on the first dielectric layer, wherein the second metal electrode includes a plurality of digitated elements over the first dielectric layer; forming at least one via on the first metal electrode, wherein the at least one via in a location is over the least one oxide region in the copper electrode; forming a second dielectric layer on the second metal electrode; and forming a third metal electrode on the second dielectric layer and extending horizontally over at least two of the plurality of digitated elements of the second metal electrode.

17 . The method of claim 16 , wherein forming the copper electrode includes:
forming an opening in a dielectric layer, the opening including the at least one oxide region therein; forming copper in the opening and about the at least one oxide region; and planarizing to form the copper electrode.

18 . The method of claim 16 , wherein the at least one oxide region has a horizontal cross-sectional size sufficient to be under more than one of the at least one vias.

19 . The method of claim 16 , wherein the first metal electrode and the second metal electrode include tantalum (Ta).

Assignees

• Globalfoundries Sg Pte Ltd

Inventors

• Khor Eejan
• Chockalingam Ramasamy
• Tan Juan Boon
• Somasuntharam Pannirselvam

Classifications

• H10D1/692 Primary

  Electrodes · CPC title

• H10W20/496 Primary

  Capacitor integral with wiring layers · CPC title

• H10D1/716

  having vertical extensions · CPC title

• H10W44/601 Primary

  Capacitive arrangements (H10W44/20 takes precedence) · CPC title

• H01L23/5223 Primary

  Electricity · mapped topic