Structure and method for fabricating a computing system with an integrated voltage regulator module

Patent metadata

Field	Value
Publication number	US-12550412-B2
Application number	US-202418622588-A
Country	US
Kind code	B2
Filing date	Mar 29, 2024
Priority date	Sep 30, 2015
Publication date	Feb 10, 2026
Grant date	Feb 10, 2026

Abstract

Systems including voltage regulator circuits are disclosed. In one embodiment, an apparatus includes a voltage regulator controller integrated circuit (IC) die including one or more portions of a voltage regulator circuit. The apparatus further includes a capacitor die, an inductor die, and an interconnect layer arranged over the voltage regulator controller IC die, the capacitor die and the inductor die. The interconnect provides electrical connections between the voltage regulator controller IC die, the capacitor die and the inductor die to form the voltage regulator circuit. In a further embodiment, the voltage regulator controller IC die, the capacitor die and the inductor die are arranged in a planar fashion within a voltage regulator module. In still another embodiment, a system IC is coupled to the voltage regulator module and includes one or more functional circuit blocks coupled to receive a regulated supply voltage generated by the voltage regulator circuit.

First claim

What is claimed is:

1 . An apparatus comprising:
a voltage regulator controller integrated circuit (IC) die including one or more portions of a voltage regulator circuit; a capacitor die including one or more capacitors; an inductor die including one or more inductors; and an interconnect layer arranged over the voltage regulator controller IC die, the capacitor die and the inductor die, wherein the interconnect layer provides electrical connections between the voltage regulator controller IC die, the capacitor die and the inductor die to form the voltage regulator circuit.

2 . The apparatus of claim 1 , wherein the voltage regulator circuit is configured to generate a regulated supply voltage on a regulated supply voltage node.

3 . The apparatus of claim 1 , wherein at least one of the capacitor die or the inductor die is formed using a semiconductor manufacturing process.

4 . The apparatus of claim 3 , wherein the voltage regulator controller IC die is formed using a first semiconductor manufacturing process and at least one of the capacitor die or the inductor die is formed using a second semiconductor manufacturing process different from the first semiconductor manufacturing process.

5 . The apparatus of claim 1 , wherein the voltage regulator controller IC die, the capacitor die and the inductor die are arranged in a planar fashion within a voltage regulator module.

6 . The apparatus of claim 5 , wherein the interconnect layer further provides electrical connection between the voltage regulator controller IC die and one or more solder bumps configured to connect the voltage regulator module to external circuitry.

7 . The apparatus of claim 2 , wherein the voltage regulator controller IC die includes:
a reference generator circuit configured to generate a reference voltage; a comparison circuit configured to compare the reference voltage to the regulated supply voltage; and a control circuit configured to control operation of the voltage regulator circuit based on comparing the reference voltage and the regulated supply voltage.

8 . The apparatus of claim 5 , further comprising a system IC coupled to the voltage regulator module, wherein the system IC includes one or more functional circuit blocks coupled to receive a regulated supply voltage generated by the voltage regulator circuit.

9 . A method comprising:
arranging a voltage regulator controller integrated circuit (IC) die, a capacitor die and an inductor die in a planar fashion within a voltage regulator module, wherein the voltage regulator IC die includes one or more portions of a voltage regulator circuit, the capacitor die includes one or more capacitors, and the inductor die includes one or more inductors; arranging an interconnect layer over the voltage regulator controller IC die, the capacitor die and the inductor die; and via the interconnect layer, electrically coupling the voltage regulator controller IC die, the capacitor die and the inductor die to form the voltage regulator circuit.

10 . The method of claim 9 , wherein at least one of the capacitor die or the inductor die is formed using a semiconductor manufacturing process.

11 . The method of claim 10 , wherein the voltage regulator controller IC die is formed using a first semiconductor manufacturing process and at least one of the capacitor die or the inductor die is formed using a second semiconductor manufacturing process different from the first semiconductor manufacturing process.

12 . The method of claim 9 , further comprising:
forming a plurality of solder bumps over the interconnect layer; and electrically coupling the voltage regulator controller IC die to one or more of the plurality of solder bumps.

13 . The method of claim 9 , further comprising electrically coupling a system IC to the voltage regulator module.

14 . An apparatus comprising:
a system integrated circuit (IC) having a plurality of functional circuit blocks implemented thereon; and a voltage regulator module coupled to the system IC, the voltage regulator module including:
a voltage regulator controller IC die including one or more portions of a voltage regulator circuit;
a capacitor die including one or more capacitors;
an inductor die including one or more inductors; and
a first interconnect layer configured to provide electrical connections between the voltage regulator controller IC die, the capacitor die and the inductor die to form the voltage regulator circuit.

15 . The apparatus of claim 14 , wherein:
the voltage regulator controller IC die, the capacitor die and the inductor die are arranged in a planar fashion within the voltage regulator module; and the first interconnect layer is disposed over the voltage regulator controller IC die, the capacitor die and the inductor die.

16 . The apparatus of claim 14 , wherein:
the voltage regulator circuit is configured to generate a regulated supply voltage on a regulated supply voltage node; and one or more of the plurality of functional circuit blocks is coupled to receive the regulated supply voltage.

17 . The apparatus of claim 16 , wherein the voltage regulator controller IC die includes:
a reference generator circuit configured to generate a reference voltage; a comparison circuit configured to compare the reference voltage to the regulated supply voltage; and a control circuit configured to control operation of the voltage regulator circuit based on comparing the reference voltage and the regulated supply voltage.

18 . The apparatus of claim 14 , wherein the voltage regulator module is coupled to the system IC using a second interconnect layer of a system package.

19 . The apparatus of claim 18 , wherein the voltage regulator module and system IC are arranged on the same side of the second interconnect layer.

20 . The apparatus of claim 18 , wherein the voltage regulator module and system IC are arranged on opposite sides of the second interconnect layer.

Assignees

• Apple Inc

Inventors

• Ramachandran Vidhya
• Zhai Jun
• Zhong Chonghua
• Hu Kunzhong
• Searles Shawn
• Dibene Ii Joseph T
• Pang Mengzhi

Classifications

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10W90/728

  between a chip and a stacked discrete passive device, e.g. resistors, capacitors or inductors · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title