Resistive random-access memory elements with lateral sidewall switching

US12484234B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12484234-B2
Application numberUS-202318140677-A
CountryUS
Kind codeB2
Filing dateApr 28, 2023
Priority dateApr 28, 2023
Publication dateNov 25, 2025
Grant dateNov 25, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Structures for a resistive random-access memory element and methods of forming a structure for a resistive random-access memory element. The structure comprises an interlayer dielectric layer including a first trench having a sidewall and a second trench having a sidewall adjacent to the sidewall of the first trench. The structure further comprises a first layer on the sidewall of the first trench, a second layer inside the second trench, and a third layer on the sidewall of the second trench. The first layer comprises a first metal, the second layer comprises a second metal, and the third layer comprises a dielectric material. The third layer includes a portion positioned between the first layer and the second layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A structure for a random-access resistive memory device, the structure comprising: a first interlayer dielectric layer including a first trench having a sidewall and a second trench having a sidewall adjacent to the sidewall of the first trench; a first layer on the sidewall of the first trench, the first layer comprising a first metal; a second layer inside the second trench, the second layer comprising a second metal; and a third layer on the sidewall of the second trench, the third layer comprising a first dielectric material, and the third layer including a first portion positioned between the first layer and the second layer. 2 . The structure of claim 1 wherein the first metal comprises tantalum nitride. 3 . The structure of claim 1 wherein the first dielectric material comprises hafnium oxide. 4 . The structure of claim 1 wherein the second metal comprises tantalum nitride. 5 . The structure of claim 1 wherein the second trench includes a lateral extension, and the first portion of the third layer is positioned in the lateral extension. 6 . The structure of claim 5 wherein the first interlayer dielectric layer has a top surface, and further comprising: a dielectric layer positioned on the top surface of the first interlayer dielectric layer, the dielectric layer having a first portion overlapping with the first trench and a second portion overlapping with the lateral extension of the second trench. 7 . The structure of claim 6 wherein the third layer includes a second portion positioned on the dielectric layer, and the second layer includes a second portion positioned on the second portion of the third layer. 8 . The structure of claim 7 further comprising: a second interlayer dielectric layer on the first interlayer dielectric layer; and a metal feature in the second interlayer dielectric layer, the metal feature coupled to the second portion of the second layer. 9 . The structure of claim 5 wherein the second layer includes a first portion positioned inside the lateral extension of the second trench, and the first portion of the third layer is positioned between the first layer and the first portion of the third layer. 10 . The structure of claim 9 wherein the third layer is conformally positioned on the sidewall of the second trench, and the second layer is conformally positioned with a substantially uniform thickness on the third layer. 11 . The structure of claim 1 wherein the first portion of the third layer is positioned adjacent to the first layer, and the first portion of the third layer is positioned adjacent to the second layer. 12 . The structure of claim 1 wherein the first portion of the third layer adjoins the first layer, and the first portion of the third layer adjoins the second layer. 13 . The structure of claim 1 wherein the first layer is conformally positioned with a substantially uniform thickness on the sidewall of the first trench. 14 . The structure of claim 1 wherein the third layer is conformally positioned with a substantially uniform thickness on the sidewall of the second trench. 15 . The structure of claim 14 wherein the second layer is conformally positioned with a substantially uniform thickness on the third layer. 16 . The structure of claim 13 further comprising: a second interlayer dielectric layer on the first interlayer dielectric layer, the second interlayer dielectric layer comprising a second dielectric material, wherein the second dielectric material of the second interlayer dielectric layer is positioned inside the second trench, and a first portion of the second layer and the first portion of the third layer are positioned between the first layer and the second dielectric material of the second interlayer dielectric layer. 17 . The structure of claim 16 further comprising: a metal feature in the second interlayer dielectric layer, the metal feature coupled to a second portion of the second layer. 18 . The structure of claim 1 wherein the first layer is conformally positioned on the sidewall of the first trench, the third layer is conformally positioned on the sidewall of the second trench, the second layer is conformally positioned on the third layer, and the first layer, the second layer, and the third layer have substantially uniform thicknesses. 19 . The structure of claim 1 further comprising: a metal feature inside the first trench, the first layer positioned between the first portion of the third layer and the metal feature. 20 . A method of forming a structure for a random-access resistive memory device, the method comprising: forming an interlayer dielectric layer; forming a first trench in the interlayer dielectric layer; forming a second trench in the interlayer dielectric layer, the second trench having a sidewall adjacent to a sidewall of the first trench; forming a first layer on the sidewall of the first trench, wherein the first layer comprises a first metal; forming a second layer inside the second trench, wherein the second layer comprises a second metal; and forming a third layer on the sidewall of the second trench, wherein the third layer comprises a dielectric material, and the third layer includes a portion positioned between the first layer and the second layer.

Assignees

Inventors

Classifications

  • comprising selection components having three or more electrodes, e.g. transistors · CPC title

  • Multistable switching devices, e.g. memristors · CPC title

  • adapted for essentially vertical current flow, e.g. sandwich or pillar type devices · CPC title

  • Binary metal oxides, e.g. TaOx · CPC title

  • H10B63/80Primary

    Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays · CPC title

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What does patent US12484234B2 cover?
Structures for a resistive random-access memory element and methods of forming a structure for a resistive random-access memory element. The structure comprises an interlayer dielectric layer including a first trench having a sidewall and a second trench having a sidewall adjacent to the sidewall of the first trench. The structure further comprises a first layer on the sidewall of the first tre…
Who is the assignee on this patent?
Globalfoundries Sg Pte Ltd
What technology area does this patent fall under?
Primary CPC classification H10B63/80. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 25 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).