Capacitor and memory device

Patent metadata

Field	Value
Publication number	US-12453077-B2
Application number	US-202418675175-A
Country	US
Kind code	B2
Filing date	May 28, 2024
Priority date	Sep 21, 2020
Publication date	Oct 21, 2025
Grant date	Oct 21, 2025

Abstract

A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.

First claim

What is claimed is:

1. A capacitor, comprising:
a lower electrode;
a dielectric layer structure on the lower electrode; and
an upper electrode on the dielectric layer structure,
wherein the dielectric layer structure includes:
a first insert layer contacting the lower electrode, the first insert layer including at least one of Al, Ta, Nb, Mo, W, Ru, V, Y, Sc, or Gd,
a first stacked structure on the first insert layer and the first stacked structure includes a first layer, a second layer and a third layer sequentially stacked, and
a second insert layer on the first stacked structure and the second insert layer including at least one of Al, Ta, Nb, Mo, W, Ru, V, Y, Sc, or Gd, and

wherein the second layer includes hafnium or hafnium oxide.

2. The capacitor as claimed in claim 1 , wherein the dielectric layer structure further comprises a fourth layer on the second insert layer.

3. The capacitor as claimed in claim 2 , wherein the third layer is formed of the same material as the fourth layer.

4. The capacitor as claimed in claim 3 , wherein the third layer includes zirconium or zirconium oxide.

5. The capacitor as claimed in claim 2 , wherein the second insert layer and the fourth layer are amorphous.

6. The capacitor as claimed in claim 1 , wherein the dielectric layer structure further comprises an interface layer between the first insert layer and the first stacked structure and the interface layer includes a zirconium niobium oxide (ZrNbO) layer, a titanium niobium oxide (TiNbO) layer, or a stacked structure of the titanium niobium oxide (TiNbO) layer and the zirconium niobium oxide (ZrNbO) layer.

7. The capacitor as claimed in claim 6 , wherein the dielectric layer structure further comprises a third insert layer between the interface layer and the first stacked structure and the third insert layer includes at least one of Al, Ta, Nb, Mo, W, Ru, V, Y, Sc, or Gd.

8. The capacitor as claimed in claim 6 , wherein the dielectric layer structure further comprises a fourth layer on the second insert layer.

9. The capacitor as claimed in claim 8 , wherein the third layer is formed of the same material as the fourth layer.

10. The capacitor as claimed in claim 9 , wherein the third layer includes zirconium or zirconium oxide.

11. The capacitor as claimed in claim 8 , wherein the second insert layer and the fourth layer are amorphous.

12. The capacitor as claimed in claim 1 , wherein each of the lower electrode and the upper electrode includes titanium nitride (TiN), titanium (Ti), tantalum (Ta), tantalum nitride (TaN), ruthenium (Ru), tungsten, or tungsten nitride.

13. The capacitor as claimed in claim 1 , wherein the lower electrode has a pillar shape.

14. A capacitor, comprising:
a lower electrode;
a first stacked structure on the lower electrode, the first stacked structure including a first layer, a second layer and a third layer sequentially stacked;
an insert layer between the first stacked structure and a fourth layer and the insert layer includes at least one of Al, Ta, Nb, Mo, W, Ru, V, Y, Sc, or Gd; and
an upper electrode on the fourth layer,
wherein the third layer is formed of the same material as the fourth layer, and
wherein the third layer is crystalline layer and the fourth layer is an amorphous layer.

15. The capacitor as claimed in claim 14 , wherein the third layer includes zirconium or zirconium oxide.

16. The capacitor as claimed in claim 14 , wherein the second layer includes hafnium or hafnium oxide.

17. The capacitor as claimed in claim 14 , wherein the insert layer is amorphous.

18. The capacitor as claimed in claim 14 , wherein the lower electrode has a pillar shape.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Cho Cheoljin
• Lim Jaesoon
• Choi Jaehyoung
• Park Jungmin

Classifications

• H10D1/694

  comprising noble metals or noble metal oxides · CPC title

• H10D1/682

  having dielectrics comprising perovskite structures · CPC title

• H10B12/30 Primary

  DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells · CPC title

• C01G27/02

  Oxides · CPC title

• C01G25/02

  Oxides · CPC title