Circuit board having multiple solder resists and displaying apparatus having the same

Patent metadata

Field	Value
Publication number	US-12419149-B2
Application number	US-202217684970-A
Country	US
Kind code	B2
Filing date	Mar 2, 2022
Priority date	Mar 5, 2021
Publication date	Sep 16, 2025
Grant date	Sep 16, 2025

Abstract

A circuit board includes a base having a plurality of interconnections on an upper surface thereof, a first photosensitive solder resist (PSR) covering the interconnections and defining a pad open region exposing portions of the interconnections, a second PSR covering the first PSR and having an opening exposing the pad open region. The opening of the second PSR is larger than the pad open region of the first PSR.

First claim

The invention claimed is:

1. A circuit board, comprising:
a base;
a plurality of interconnections disposed on an upper surface of the base, each interconnection comprising a plurality of portions;
a first photosensitive solder resist (PSR) covering a portion of each of the plurality of interconnections, the first PSR arranged to define a pad open region configured to expose a remainder portion of each of the plurality of interconnection; and
a second PSR covering the first PSR and having an opening configured to expose the pad open region,
wherein the opening of the second PSR is larger than the pad open region of the first PSR.

2. The circuit board of claim 1 ,
wherein the second PSR is thicker than the first PSR.

3. The circuit board of claim 2 , wherein:
the first PSR has a thickness of about 10 μm to about 15 μm, and
the second PSR has a thickness of about 20 μm to about 25 μm.

4. The circuit board of claim 1 ,
wherein the plurality of interconnections includes four interconnections disposed on the upper surface of the base and the first PSR covers the portion of each of the four interconnections; and
the pad open region is further configured to expose the remainder portion of each of the four interconnections.

5. The circuit board of claim 1 , wherein:
each of the plurality of interconnections includes a first portion located in the pad open region, a second portion located in the opening of the second PSR and covered with the first PSR, and a third portion covered with both the first PSR and second PSR; and
the remainder portion of each of the plurality of interconnections corresponds to the first portion and the portion of each of the plurality of interconnections, covered by the first PSR, correspond to the second portion and the third portion.

6. The circuit board of claim 1 ,
wherein the circuit board is a printed circuit board.

7. A displaying apparatus, comprising:
a circuit board;
a unit pixel disposed on the circuit board; and
a molding member covering the unit pixel;
the circuit board comprising:
a base having a plurality of interconnections on an upper surface thereof;
a first photosensitive solder resist (PSR) covering a portion of each of the plurality of interconnection, the first PSR arranged to define a pad open region configured to expose a remainder portion of each of the plurality of interconnections; and
a second PSR covering the first PSR and having an opening configured to expose the pad open region, wherein:

the opening of the second PSR is larger than the pad open region of the first PSR, and
the unit pixel is disposed in the pad open region and in the opening of the second PSR such that the unit pixel is electrically coupled to the remainder portion of each of the plurality of interconnections in the pad open region.

8. The displaying apparatus of claim 7 ,
wherein the unit pixel includes at least three light emitting devices disposed adjacent to one another.

9. The displaying apparatus of claim 7 ,
the unit pixel comprising:
a plurality of light emitting stacks stacked one above another; and
a plurality of connection electrodes electrically connected to the plurality of light emitting stacks.

10. The displaying apparatus of claim 7 ,
wherein the unit pixel is arranged to cover the pad open region.

11. The displaying apparatus of claim 7 ,
wherein the molding member includes a light absorbing material.

12. The displaying apparatus of claim 7 , further comprising:
a display panel; and
a pixel module disposed on the display panel,
wherein the pixel module includes the circuit board and a plurality of unit pixels.

13. A displaying apparatus, comprising:
a panel substrate;
a plurality of pixel modules arranged on the panel substrate, each pixel module comprising:
a circuit board;
a plurality of unit pixels disposed on the circuit board; and
a molding member covering the plurality of unit pixels;
wherein the circuit board further comprises:
a base having a plurality of interconnections on an upper surface thereof, wherein an interconnection of the plurality of interconnections comprises a first part, a second part, and a third part;
a pad open region formed in a first photosensitive solder resist (PSR) layer, the pad open region configured to expose the first part of the interconnection, and the first PSR layer covering the second part and the third part of the interconnection; and
an opening formed in a second PSR layer covering a portion of the first PSR layer, the pad open region exposed in the opening of the second PSR layer; and

wherein a unit pixel of the plurality of unit pixels is disposed in the opening such that the unit pixel is electrically connected to the first part of the interconnection in the pad open region.

14. The displaying apparatus of claim 13 ,
wherein the unit pixel covers the pad open region and includes at least a portion mounted in the opening.

15. The displaying apparatus of claim 13 ,
wherein the first part of the interconnection is located in the pad open region, the second part located in the opening of the second PSR layer and covered with the first PSR layer, and the third part covered with both the first PSR layer and the second PSR layer.

16. The displaying apparatus of claim 13 , wherein the unit pixel further comprises:
a plurality of light emitting stacks stacked one above another on a substrate; and
a plurality of connection electrodes electrically connected to the plurality of light emitting stacks.

17. The displaying apparatus of claim 16 , wherein:
the plurality of light emitting stacks is operable to emit light of different peak wavelengths from one another; and
one of the plurality of light emitting stacks, farther from the substrate, emits light of a longer wavelength than another light emitting stack near the substrate.

18. The displaying apparatus of claim 17 , wherein an emission area of each of the plurality of light emitting stacks increases as a distance to the substrate decreases.

19. The displaying apparatus of claim 13 , wherein:
the unit pixel further comprises a plurality of connection electrodes which is electrically connected to the first part of the interconnection via a bonding material; and
the bonding material is disposed in the pad open region.

Assignees

• Seoul Semiconductor Co Ltd

Inventors

• Ki Youngsik
• Hong Seung Sik

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/411

  characterised by materials, geometry or structure of the substrates · CPC title

• H10H20/857 Primary

  Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

• H10H20/852

  Encapsulations · CPC title