Micro-LED display and manufacturing method therefor

Patent metadata

Field	Value
Publication number	US-11658162-B2
Application number	US-201816629768-A
Country	US
Kind code	B2
Filing date	Jun 26, 2018
Priority date	Jul 10, 2017
Publication date	May 23, 2023
Grant date	May 23, 2023

Abstract

The disclosure describes a micro Light Emitting Diode (LED) display. The display may include a Printed Circuit Board (PCB) including a plurality of solder pads, a micro LED package including a plurality of micro LED chips, and a plurality of solder electrodes which bond the micro LED chips onto the solder pads of the PCB. The micro LED package may be re-arranged in an Red Green Blue (RGB) state on a temporary fixing film by using a pickup device in accordance with a display pixel configuration, after the micro LED chips are attached to a carrier film.

First claim

What is claimed is:

1. A method comprising:
attaching micro LED chips having a first arrangement to a carrier film;
re-arranging the micro LED chips on a temporary fixing film in an Red Green Blue (RGB) second arrangement in accordance with a display pixel configuration, using a pickup device;
fixing the re-arranged micro LED chips in a mold;
coating a photosensitive material on connecting pads of the micro LED chips to fix locations for coupling the connecting pads to circuits on a printed circuit board (PCB); and
bonding the PCB to a face of the mold.

2. A method of manufacturing a micro LED display, the method comprising:
attaching each of micro LED chips to a carrier film in a pad down form;
re-arranging the attached micro LED chips in accordance with a pixel configuration of the display in a pad down form to a temporary fixing film, using a pickup device;
molding the re-arranged micro LED chips in a mold;
removing the temporary fixing film from the molded micro LED chips; and
performing Fan-Out Panel Level Package (FOPLP) processing on the molded micro LED chips.

3. The method of claim 2 , further comprising:
bonding the micro LED chips to a substrate, wherein the FOPLP processing is performed on the micro LED chips having the substrate bonded thereto, and
wherein the FOPLP processing comprises:
forming a via in a lower portion of the substrate using a laser;
filling the via with a conductive material using a plating process; and
forming a circuit through a photolithography process after plating deposition is performed on a face of the substrate.

4. The method of claim 3 , further comprising:
forming a solder electrode on a connecting pad of the micro LED chips;
performing singulation on the micro LED chips, on which the solder electrode is formed, with a package of a specific size; and
mounting the package of the micro LED chips to a PCB to produce a display.

5. The method of claim 2 , further comprising separating the micro LED chips from a sapphire substrate using a Laser Lift-Off (LLO) process of irradiating a laser to the micro LED chips attached to the sapphire substrate, and wherein the temporary fixing film is removed through the LLO process.

6. The method of claim 5 , further comprising a wet etching process in which the micro LED chips separated from the sapphire substrate are dipped into liquid metal (H 3 PO 4 ) in a container for a specific time, wherein the wet etching process removes gallium.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Youngchul
• Park Taesang
• Lee Kyoree
• Lee Tackmo
• Heo Gyun
• Moon Youngjun
• Choi Won

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10H20/01 Primary

  Manufacture or treatment · CPC title

• H10H20/852

  Encapsulations · CPC title

• H10H20/85

  Packages · CPC title

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title