Semiconductor Package Having Symmetrically Arranged Power Terminals and Method for Producing the Same
US-2020035579-A1 · Jan 30, 2020 · US
US12374661B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12374661-B2 |
| Application number | US-202217881682-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 5, 2022 |
| Priority date | Aug 5, 2022 |
| Publication date | Jul 29, 2025 |
| Grant date | Jul 29, 2025 |
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A power module includes: a first substrate having a patterned first metallization; a second substrate vertically aligned with the first substrate and having a patterned second metallization that faces the patterned first metallization; first vertical power transistor dies having a drain pad attached to a first island of the patterned first metallization and a source pad electrically connected to a first island of the patterned second metallization via first spacers; and second vertical power transistor dies having a source pad electrically connected to the first island of the patterned first metallization via second spacers. A first subset of the second vertical power transistor dies has a drain pad attached to a second island of the patterned second metallization. A second subset of the second vertical power transistor dies has a drain pad attached to a third island of the patterned second metallization. A method of producing the module is described.
Opening claim text (preview).
What is claimed is: 1. A power module, comprising: a first substrate comprising a patterned first metallization; a second substrate vertically aligned with the first substrate and comprising a patterned second metallization that faces the patterned first metallization; a first plurality of vertical power transistor dies having a drain pad attached to a first island of the patterned first metallization and a source pad electrically connected to a first island of the patterned second metallization via a first plurality of spacers; and a second plurality of vertical power transistor dies having a source pad electrically connected to the first island of the patterned first metallization via a second plurality of spacers, wherein a first subset of the second plurality of vertical power transistor dies has a drain pad attached to a second island of the patterned second metallization and a second subset of the second plurality of vertical power transistor dies has a drain pad attached to a third island of the patterned second metallization. 2. The power module of claim 1 , wherein the patterned first metallization comprises a gate island, and wherein wire bond connections are formed between the gate island of the patterned first metallization and a gate pad of the first plurality of vertical power transistor dies. 3. The power module of claim 1 , wherein the patterned second metallization comprises at least one gate island, and wherein first wire bond connections are formed between the at least one gate island of the patterned second metallization and a gate pad of the second plurality of vertical power transistor dies. 4. The power module of claim 3 , further comprising: a first gate terminal attached to a first additional island of the patterned first metallization; and a first additional spacer electrically connecting the first additional island of the patterned first metallization to the at least one gate island of the patterned second metallization. 5. The power module of claim 4 , further comprising: a second gate terminal attached to a second additional island of the patterned first metallization; a second additional spacer electrically connecting the second additional island of the patterned first metallization to a first additional island of the patterned second metallization; a third additional spacer electrically connecting the first additional island of the patterned second metallization to a gate island of the patterned first metallization; and second wire bond connections between the gate island of the patterned first metallization and a gate pad of the first plurality of vertical power transistor dies. 6. The power module of claim 3 , wherein the at least one gate island of the patterned second metallization extends between the first island and the second island of the patterned second metallization and between the first island and the third island of the patterned second metallization. 7. The power module of claim 3 , further comprising: a first gate terminal attached to the at least one gate island of the patterned second metallization. 8. The power module of claim 7 , further comprising: a second gate terminal attached to a gate island of the patterned first metallization; and second wire bond connections between the gate island of the patterned first metallization and a gate pad of the first plurality of vertical power transistor dies. 9. The power module of claim 1 , wherein the first plurality of vertical power transistor dies is electrically coupled in parallel to form a first switch of a half bridge, and wherein the second plurality of vertical power transistor dies are electrically coupled in parallel to form a second switch of the half bridge. 10. The power module of claim 9 , further comprising: an AC terminal attached to the first island of the patterned first metallization; a first DC terminal attached to a first additional island of the patterned first metallization; a second DC terminal attached to a second additional island of the patterned first metallization, the second DC terminal being at the same potential as the first DC terminal; a third DC terminal attached to a third additional island of the patterned first metallization, the third DC terminal interposed between the first and second DC terminals and being at a different potential than the first and second DC terminals; at least one first additional spacer electrically connecting the first additional island of the patterned first metallization to the second island of the patterned second metallization; at least one second additional spacer electrically connecting the second additional island of the patterned first metallization to the third island of the patterned second metallization; and at least one third additional spacer electrically connecting the third additional island of the patterned first metallization to the first island of the patterned second metallization. 11. The power module of claim 10 , further comprising: a first gate terminal attached to a fourth additional island of the patterned first metallization; a fourth additional spacer electrically connecting the fourth additional island of the patterned first metallization to at least one gate island of the patterned second metallization; and first wire bond connections formed between the at least one gate island of the patterned second metallization and a gate pad of the second plurality of vertical power transistor dies. 12. The power module of claim 11 , further comprising: a second gate terminal attached to a fifth additional island of the patterned first metallization; a fifth additional spacer electrically connecting the fifth additional island of the patterned first metallization to a second additional island of the patterned second metallization; a sixth additional spacer electrically connecting the second additional island of the patterned second metallization to a gate island of the patterned first metallization; and second wire bond connections between the gate island of the patterned first metallization and a gate pad of the first plurality of vertical power transistor dies. 13. The power module of claim 9 , further comprising: a first gate terminal attached to at least one gate island of the patterned second metallization; and first wire bond connections between the at least one gate island of the patterned second metallization and a gate pad of the second plurality of vertical power transistor dies. 14. The power module of claim 13 , further comprising: a second gate terminal attached to a gate island of the patterned first metallization; and second wire bond connections between the gate island of the patterned first metallization and a gate pad of the first plurality of vertical power transistor dies. 15. The power module of claim 9 , further comprising: an AC terminal attached to the first island of the patterned first metallization; a first DC terminal attached to the second island of the patterned second metallization; a second DC terminal attached to the third island of the patterned second metallization, the second DC terminal being at the same potential as the first DC terminal; a third DC terminal attached to the first island of the patterned second metallization, the third DC terminal interposed between the first and second DC terminals and being at a different potential than the first and second DC terminals. 16. The power module of claim 1 , wherein the first substrate and the second substrate have identical areas. 17. The power module of claim 1 , where
comprising connection or disconnection of parts of a device in response to a measurement · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title
Package configurations · CPC title
Bond wires · CPC title
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