Lithographic cavity formation to enable EMIB bump pitch scaling

Patent metadata

Field	Value
Publication number	US-12354963-B2
Application number	US-202418622511-A
Country	US
Kind code	B2
Filing date	Mar 29, 2024
Priority date	Mar 23, 2018
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.

First claim

What is claimed is:

1. An electronic device, comprising:
a first layer of a first material, the first layer having a first surface, the first material including an organic material;
a second layer of a second material on the first surface of the first layer, the second layer extending a first distance away from the first surface of the first layer, the second layer including a first region and a second region spaced apart from the first region;
a bridge substrate on the first surface of the first layer, the bridge substrate between the first region of the second layer and the second region of the second layer, the bridge substrate including a second surface and a third surface opposite the second surface, the second surface of the bridge substrate facing towards the first surface of the first layer, the third surface a second distance away from the first surface of the first layer, the second distance less than the first distance, the bridge substrate including a first plurality of contacts along the third surface, the bridge substrate including silicon, a first portion of the second layer spaced apart from the bridge substrate by a second distance in a direction along a first plane parallel the first surface, a second portion of the second layer spaced apart from the bridge substrate by a third distance in a direction along a second plane parallel the first surface, the second distance different from the third distance, the first plane farther away from the first surface than the second plane is from the first surface;
a third layer of a third material between the first region of the second layer and the bridge substrate and between the second region of the second layer and the bridge substrate, at least a portion of the bridge substrate between a first portion of the third layer and the first layer, at least a portion of the second layer between a second portion of the third layer and the first layer;
a first die including a second plurality of contacts, a first one of the second plurality of contacts electrically coupled to a first one of the first plurality of contacts, a second one of the second plurality of contacts electrically coupled to first conductive material extending through the first region of the second layer; and
a second die including a third plurality of contacts, a first one of the third plurality of contacts electrically coupled to a second one of the first plurality of contacts, a second one of the third plurality of contacts electrically coupled to second conductive material extending through the second region of the second layer.

2. The electronic device of claim 1 , wherein the third layer is in contact with the first surface of the first layer at a location between the second layer and the bridge substrate.

3. The electronic device of claim 1 , wherein the second material includes an organic material.

4. An electronic device, comprising:
a first layer of a first material, the first layer having a first surface, the first material including an organic material;
a second layer of a second material on the first surface of the first layer, the second layer extending a first distance away from the first surface of the first layer, the second layer including a first region and a second region spaced apart from the first region;
a bridge substrate on the first surface of the first layer, the bridge substrate between the first region of the second layer and the second region of the second layer, the bridge substrate including a second surface and a third surface opposite the second surface, the second surface of the bridge substrate facing towards the first surface of the first layer, the third surface a second distance away from the first surface of the first layer, the second distance less than the first distance, the bridge substrate including a first plurality of contacts along the third surface, the bridge substrate including silicon;
a third layer of a third material between the first region of the second layer and the bridge substrate and between the second region of the second layer and the bridge substrate, at least a portion of the bridge substrate between a first portion of the third layer and the first layer, at least a portion of the second layer between a second portion of the third layer and the first layer, wherein the third layer contacts the third surface of the bridge substrate and lateral sidewalls of the bridge substrate;
a first die including a second plurality of contacts, a first one of the second plurality of contacts electrically coupled to a first one of the first plurality of contacts, a second one of the second plurality of contacts electrically coupled to first conductive material extending through the first region of the second layer; and
a second die including a third plurality of contacts, a first one of the third plurality of contacts electrically coupled to a second one of the first plurality of contacts, a second one of the third plurality of contacts electrically coupled to second conductive material extending through the second region of the second layer.

5. The electronic device of claim 1 , wherein the electronic device is a computing device.

6. The electronic device of claim 1 , further including a display.

7. A computing device, comprising:
a first layer, the first layer including an organic material;
a silicon bridge on the first layer, the silicon bridge including a surface facing away from the first layer, the silicon bridge including a first contact pad on the surface of the silicon bridge, the silicon bridge including a second contact pad on the surface of the silicon bridge spaced apart from the first contact pad;
a second layer on the first layer, the second layer spaced apart from and surrounding the silicon bridge, the second layer having a first thickness, the silicon bridge having a second thickness that is less than the first thickness;
a third layer extending across at least a portion of the surface of the silicon bridge, a first portion of the third layer in a space between the second layer and the silicon bridge, at least part of the second layer between a second portion of the third layer and the first layer;
a first die including a third contact pad and a fourth contact pad, the third contact pad on the first die electrically coupled to the first contact pad on the silicon bridge, the fourth contact pad on the first die electrically coupled to first conductive material extending through the second layer; and
a second die including a fifth contact pad and a sixth contact pad, the fifth contact pad on the second die electrically coupled to the second contact pad on the silicon bridge, the sixth contact pad on the second die electrically coupled to second conductive material extending through the second layer.

8. The computing device of claim 7 , wherein the second layer is spaced different distances from a lateral side of the silicon bridge at different heights of the second layer relative to the first layer.

9. The computing device of claim 7 , wherein the third layer abuts the first layer in the space between the second layer and the silicon bridge.

10. The computing device of claim 7 , wherein the second layer includes an organic material.

11. The computing device of claim 7 , wherein the third layer surrounds the silicon bridge.

12. The computing device of claim 7 , further including a display.

13. An apparatus, comprising:
a first layer including an organic material;
a second layer extending across a first portion of the first layer and across a second portion of the first layer, the second layer spaced apart from a third portion of the first layer between the first port

Assignees

• Intel Corp

Inventors

• Darmawikarta Kristof
• Tanaka Hiroki
• May Robert
• Paital Sameer
• Nie Bai
• Jones Jesse
• Tan Chung Kwang Christopher

Classifications

• H10W72/241

  Dispositions, e.g. layouts · CPC title

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title