Inverter based on electron interference
US-11552186-B2 · Jan 10, 2023 · US
US12353845B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12353845-B2 |
| Application number | US-202117393372-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 3, 2021 |
| Priority date | Jan 20, 2021 |
| Publication date | Jul 8, 2025 |
| Grant date | Jul 8, 2025 |
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A reservoir computer. In some embodiments, the reservoir computer includes a Duffing oscillator, and a readout circuit, and the readout circuit is configured to calculate a plurality of products, each of the products being calculated by multiplying a sample, of a plurality of samples of a signal from the Duffing oscillator, by a respective weight of a plurality of weights.
Opening claim text (preview).
What is claimed is: 1. A system, comprising: a Duffing oscillator, and a readout circuit, the readout circuit being configured to calculate a plurality of products, each of the products being calculated by multiplying a sample, of a plurality of samples of a signal from the Duffing oscillator, by a respective weight of a plurality of weights; the system further comprising an input circuit configured to receive an input signal, and to adjust the amplitude of the input signal, to an adjusted amplitude, to form an adjusted input signal, wherein a reflection coefficient of the Duffing oscillator is hysteretic as a function of frequency when measured with a signal having an amplitude equal to the adjusted amplitude. 2. The system of claim 1 , wherein the readout circuit is further configured to calculate the sum of the products. 3. The system of claim 1 , wherein the plurality of samples comprises ten samples. 4. The system of claim 1 , wherein the Duffing oscillator comprises a resonant circuit comprising a varactor. 5. The system of claim 1 , wherein the Duffing oscillator comprises a resonant circuit comprising a superconducting quantum interference device (SQUID). 6. The system of claim 1 , wherein the system is configured to estimate the phase of each of two sinusoidal signals present in an input signal. 7. A system, comprising: a Duffing oscillator, and a readout circuit, the readout circuit being configured to calculate a plurality of products, each of the products being calculated by multiplying a sample, of a plurality of samples of a signal from the Duffing oscillator, by a respective weight of a plurality of weights; wherein the system is configured to estimate one of: the phase of a sinusoidal input signal; the frequency of a sinusoidal input signal; and the amplitude of a sinusoidal input signal. 8. A method, comprising: operating a reservoir computer, wherein: the reservoir computer comprises: a Duffing oscillator; and a readout circuit; wherein the Duffing oscillator comprises a resonant circuit comprising a varactor or a resonant circuit comprising a superconducting quantum interference device (SQUID). 9. The method of claim 8 , further comprising training the reservoir computer. 10. The method of claim 8 , wherein the operating of the reservoir computer comprises calculating a plurality of products, each of the products being calculated by multiplying a sample, of a plurality of samples of a signal from the Duffing oscillator, by a respective weight of a plurality of weights. 11. The method of claim 10 , wherein the operating of the reservoir computer further comprises calculating the sum of the products. 12. The method of claim 8 , further comprising receiving an input signal, and adjusting the amplitude of the input signal, to an adjusted amplitude, to form an adjusted input signal. 13. The method of claim 12 , wherein a reflection coefficient of the Duffing oscillator is hysteretic as a function of frequency when measured with a signal having an amplitude equal to the adjusted amplitude. 14. The method of claim 8 , wherein the Duffing oscillator is in a state having an expected value of energy less than 10 hf wherein f is the small-amplitude resonant frequency of the Duffing oscillator and h is Planck's constant.
Multiplying only · CPC title
Adding; Subtracting (G06F7/483 - G06F7/491, G06F7/544 - G06F7/556 take precedence) · CPC title
using superconductivity effects (devices using superconductivity H10N60/00) · CPC title
Sum of products (for applications thereof, see the relevant places, e.g. G06F17/10, H03H17/00) · CPC title
by beating unmodulated signals of different frequencies · CPC title
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