Crossbar array operations using ALU modified signals

US10496374B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10496374-B2
Application numberUS-201815933081-A
CountryUS
Kind codeB2
Filing dateMar 22, 2018
Priority dateMar 22, 2018
Publication dateDec 3, 2019
Grant dateDec 3, 2019

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Abstract

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According to examples, an apparatus may include an arithmetic logic unit (ALU) to apply a modification function to a digital input signal to generate a modified digital input signal, a digital-to-analog converter (DAC) to convert the modified digital input signal to an analog input signal, a crossbar array to apply an operation on the analog input signal to generate an analog output signal, and an analog-to-digital converter (ADC). The ADC may modify the analog output signal to compensate for application of the modification function to the digital input signal, may convert the modified analog output signal to a digital output signal, and may output the digital output signal.

First claim

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What is claimed is: 1. An apparatus comprising: an arithmetic logic unit (ALU) to apply a modification function to a digital input signal to generate a modified digital input signal; a digital-to-analog converter (DAC) to convert the modified digital input signal to an analog input signal; a crossbar array to apply an operation on the analog input signal to generate an analog output signal; and an analog-to-digital converter (ADC) to: modify the analog output signal to compensate for application of the modification function to the digital input signal; convert the modified analog output signal to a digital output signal; and output the digital output signal. 2. The apparatus of claim 1 , wherein the ALU is to output the modified digital input signal to the DAC and the DAC is to output the modified analog input signal to the crossbar array. 3. The apparatus of claim 1 , wherein the operation is a set of dot-product operations. 4. The apparatus of claim 1 , wherein the crossbar array comprises an array of memristors. 5. The apparatus of claim 1 , wherein the ALU is further to determine whether the digital input signal is to be modified and to apply the modification function based on a determination that the digital input signal is to be modified. 6. The apparatus of claim 5 , wherein the modification function is any of: a normalizing function; an input converting function; a shifting function; a noise filtering function; a thermal compensation function; and a floating point converting function. 7. The apparatus of claim 6 , wherein the normalizing function is to regulate a dynamic range of the digital input signal by applying a normalization factor. 8. The apparatus of claim 6 , wherein the input converting function is to convert sparse signals of the digital input signal into dense vectors. 9. The apparatus of claim 6 , wherein the shifting function is to convert negative signal values of the digital input signal to positive values. 10. The apparatus of claim 6 , wherein the noise filtering function is to over-sample or to average the digital inputs signal values based on repeated operations in the ALU and/or crossbars. 11. The apparatus of claim 6 , wherein the thermal compensation function is to compensate for the analog output signal accuracy loss through the crossbar due to increased conductivity of memristors resulting from a high temperature. 12. The apparatus of claim 6 , wherein the floating point converting function is to convert floating point numbers of the digital input signal to fixed point numbers prior to providing the digital input signal to the DAC. 13. An apparatus comprising: a digital-to-analog converter (DAC); an analog-to-digital converter (ADC); a crossbar array; a set of amplifiers; and a device to: determine whether a digital input signal is to be modified; based on a determination that the digital input signal is to be modified, apply a modification function to the digital input signal to generate a modified digital input signal; output the modified digital input signal to the DAC; output an indication that the modification function was applied to the digital input signal, wherein: the DAC is to convert the modified digital input signal to an analog input signal; the crossbar array is to: receive the analog input signal; apply an arithmetic operation on the analog input signal to generate an analog output signal; the set of amplifiers are to sample and convert signals from the crossbar array from current to voltage; and the ADC is to: receive the indication that the modification function was applied to the digital input signal; receive the analog output signal from the crossbar array; modify the analog output signal to reverse the application of the modification function to the digital input signal; convert the modified analog output signal to a digital output signal; and output the digital output signal. 14. A method comprising: applying, by a device, a modification function to a digital input signal to generate a modified digital input signal; converting, by a digital-to-analog converter (DAC), the modified digital input signal to an analog input signal; applying, by a crossbar array, an operation to the analog input signal to generate an analog output signal; modifying, by an analog-to-digital converter (ADC), the analog output signal to compensate for application of the modification function on the digital input signal; converting, by the ADC, the modified analog output signal to a digital output signal; and outputting, by the ADC, the digital output signal. 15. The method of claim 14 , further comprising: determining whether the digital input signal is to be modified; applying the modification function based on a determination that the digital input signal is to be modified; and outputting the digital input signal to the DAC based on a determination that the digital input signal is not to be modified. 16. The method of claim 14 , further comprising: applying the modification function to regulate a dynamic range of the digital input signal by applying a normalization factor. 17. The method of claim 14 , further comprising: applying the modification function to convert sparse signals within the digital input signal into dense vectors. 18. The method of claim 14 , further comprising: applying the modification function to convert negative signal values of the digital input signal to positives. 19. The method of claim 14 , further comprising: applying the modification function to over-sample or to average the digital input signal values. 20. The method of claim 14 , further comprising: applying the modification function to compensate for a digital output signal accuracy loss resulting from a high temperature.

Assignees

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Classifications

  • Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

  • Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters · CPC title

  • Cell access · CPC title

  • comprising metal oxide memory material, e.g. perovskites · CPC title

  • Array wherein the access device being a transistor · CPC title

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What does patent US10496374B2 cover?
According to examples, an apparatus may include an arithmetic logic unit (ALU) to apply a modification function to a digital input signal to generate a modified digital input signal, a digital-to-analog converter (DAC) to convert the modified digital input signal to an analog input signal, a crossbar array to apply an operation on the analog input signal to generate an analog output signal, and…
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification G06F7/5443. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).