Manufacturing and reuse of semiconductor substrates

Patent metadata

Field	Value
Publication number	US-12249504-B2
Application number	US-202217743006-A
Country	US
Kind code	B2
Filing date	May 12, 2022
Priority date	Oct 22, 2021
Publication date	Mar 11, 2025
Grant date	Mar 11, 2025

Abstract

pa The method of processing a semiconductor wafer includes forming one or more epitaxial layers over its first main surface. It also involves forming one or more porous layers within the semiconductor wafer or within the epitaxial layers. Together, the semiconductor wafer, the epitaxial layer(s), and the porous layer(s) form a substrate. Next, doped regions of a semiconductor device are formed within the epitaxial layer(s). After forming these doped regions, a non-porous part of the semiconductor wafer is separated from the rest of the substrate along the porous layer(s).

First claim

What is claimed is:

1. A method of processing a semiconductor wafer, the method comprising:
forming one or more epitaxial layers over a first main surface of the semiconductor wafer;
forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate, wherein forming the one or more porous layers comprises:
forming a low conducting epitaxial layer, a low conducting wafer region, or a low conducting buried wafer region induced by implantation of dopants which provide counter-doping;
forming a higher conducting layer on the low conducting epitaxial layer, the low conducting wafer region, or the low conducting buried wafer region, the higher conducting layer having a higher average doping concentration than the low conducting epitaxial layer, low conducting wafer region, or low conducting buried wafer region; and
forming a homogenous porous layer in the higher conducting layer, wherein the low conducting epitaxial layer, the low conducting wafer region, or the low conducting buried wafer region is arranged deeper in the substrate than the homogenous porous layer;

forming doped regions of a semiconductor device in the one or more epitaxial layers; and
after forming the doped regions of the semiconductor device, separating a non-porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.

2. The method of claim 1 , wherein forming the one or more porous layers comprises porosifying semiconductor material of the semiconductor wafer or of the one or more epitaxial layers, wherein the porosifying comprises an electrochemical process that uses an electrolytic solution, the method further comprising:
varying a current and/or a voltage of the electrochemical process and/or a composition of the electrolytic solution, such that a porosity of the one or more porous layers varies in a direction perpendicular to the first main surface of the semiconductor wafer.

3. The method of claim 1 , wherein forming the one or more porous layers comprises porosifying semiconductor material of the semiconductor wafer or of the one or more epitaxial layers, the method further comprising:
prior to the porosifying, modifying a doping concentration of the semiconductor material to be porosified.

4. The method of claim 3 , wherein modifying the doping concentration of the semiconductor material to be porosified comprises increasing the doping concentration of the semiconductor material to be porosified.

5. The method of claim 1 , wherein the one or more porous layers are formed in the semiconductor wafer such that the semiconductor wafer has a porous part that includes the one or more porous layers and the non-porous part which excludes the one or more porous layers.

6. The method of claim 5 , further comprising:
after separating the non-porous part semiconductor wafer from the one or more epitaxial layers along the one or more porous layers, reusing the non-porous part of the semiconductor wafer.

7. The method of claim 1 , wherein the one or more porous layers are formed in the one or more epitaxial layers, and wherein the entire semiconductor wafer is non-porous and separated from the one or more epitaxial layers along the one or more porous layers.

8. The method of claim 7 , further comprising:
after separating the entire semiconductor wafer from the one or more epitaxial layers, reusing the entire semiconductor wafer.

9. The method of claim 1 , wherein forming the one or more porous layers comprises forming a stack of porous layers with different pore sizes in the semiconductor wafer or in the one or more epitaxial layers.

10. The method of claim 1 , wherein forming the one or more porous layers comprises:
forming a first porous layer having a first average pore density; and
forming a second porous layer above the first porous layer, the second porous layer having a second average pore density that is less than the first average pore density,
wherein the first porous layer and the second porous layer are structured and/or have a varying thickness.

11. The method of claim 1 , wherein forming the one or more porous layers comprises:
forming a mask on an epitaxial layer or on the first main surface of the semiconductor wafer;
implanting dopants through openings in the mask; and
applying an electric field that accelerates vertical porosification in regions where the dopants were implanted.

12. The method of claim 1 , wherein forming the one or more epitaxial layers comprises:
forming a first epitaxial layer by epitaxial lateral overgrowth of pores in an uppermost one of the one or more porous layers.

13. The method of claim 12 , wherein the first epitaxial layer has a lateral dopant concentration that varies based on pore location in the uppermost one of the one or more porous layers.

14. The method of claim 1 , further comprising:
singulating the substrate into a plurality of dies,
wherein the singulating is performed after the separating.

15. The method of claim 1 , further comprising:
singulating the substrate into a plurality of dies; and
before the separating, attaching a carrier to a side of the substrate opposite the non-porous part of the semiconductor wafer,
wherein the carrier remains attached to the substrate during the separating.

16. The method of claim 15 , wherein the singulating is performed before both the separating and the attaching of the carrier.

17. The method of claim 1 , further comprising:
singulating the substrate into a plurality of dies;
before the separating, forming a first metallization on a first side of the substrate opposite the non-porous part of the semiconductor wafer;
after the separating, forming a second metallization on a second side of the substrate exposed by the separating and which is opposite the first side.

18. The method of claim 1 , further comprising:
inducing one or more cracks that extend at least partly in the one or more porous layers, to aid in the separating,
wherein the inducing of the one or more cracks comprises irradiating the one or more porous layers with laser light.

19. The method of claim 1 , further comprising:
inducing one or more cracks that extend at least partly in the one or more porous layers, to aid in the separating,
wherein the inducing of the one or more cracks comprises applying an external force.

20. The method of claim 19 , wherein the applying of the external force comprises:
applying a layer to the substrate, the layer having a different thermal expansion coefficient than the one or more porous layers; and
cooling or heating the layer.

21. The method of claim 19 , wherein the applying of the external force comprises:
applying a thermal gradient across the substrate.

22. The method of claim 19 , wherein the applying of the external force comprises:
applying laser light to the one or more porous layers from a side of the substrate.

23. The method of claim 22 , further comprising:
modifying a doping concentration of the one or more porous layers such that a maximum absorption of the laser light occurs within the one or more porous layers.

24. The method of claim 19 , wherein the applying of the external force comprises:
applying ultrasonic vibrations to the one or more porous layers.

25. The method of

Assignees

• Infineon Technologies Ag

Inventors

• Goller Bernhard
• Binter Alexander Christian
• Hoechbauer Tobias
• Huber Martin
• Moder Iris
• Piccin Matteo
• Santos Rodriguez Francisco Javier
• Schulze Hans-Joachim

Classifications

• H10P95/11 Primary

  Separation of active layers from substrates · CPC title

• H10P90/15

  by making porous regions on the surface · CPC title

• H10P14/46

  using a liquid · CPC title

• H10P14/6349 Primary

  Deposition of epitaxial materials · CPC title

• H10P72/74

  using temporarily an auxiliary support · CPC title