Package substrate and semiconductor structure with same

Patent metadata

Field	Value
Publication number	US-12224244-B2
Application number	US-202217582171-A
Country	US
Kind code	B2
Filing date	Jan 24, 2022
Priority date	Feb 5, 2021
Publication date	Feb 11, 2025
Grant date	Feb 11, 2025

Abstract

There is provided a package substrate and a semiconductor structure with the same. The package substrate includes a body and a plurality of conducive bridges. The body includes an opening region. The plurality of conductive bridges are disposed separately in the opening region, and adjacent conductive bridges have a respective distance value. At least two of the distance values are not equal.

First claim

The invention claimed is:

1. A package substrate, comprising:
a body including an opening region; and
a plurality of conductive bridges disposed separately in the opening region, and adjacent conductive bridges among the plurality of conductive bridges having a respective distance value, and there are a plurality of distance values among of the plurality of conductive bridges; and,
wherein at least two distance values among the plurality of distance values are not equal; and
the plurality of conductive bridges comprise: a first conductive bridge provided with a first through hole.

2. The package substrate of claim 1 , wherein a gap is provided between the adjacent conductive bridges, and the body is provided with a vent hole which is opposite to the gap.

3. The package substrate of claim 2 , wherein there are a plurality of vent holes, the plurality of vent holes are separately disposed on the body, and each of the plurality of vent holes corresponds to a respective gap.

4. The package substrate of claim 3 , wherein there are a plurality of hole pitches between the plurality of vent holes, a hole pitch is a pitch between adjacent vent holes, and at least two hole pitches in the plurality of hole pitches are not equal.

5. The package substrate of claim 4 , wherein the plurality of hole pitches are all different from each other, and the plurality of hole pitches gradually increase along a first length direction of the opening region.

6. The package substrate of claim 4 , wherein adjacent conductive bridges between adjacent vent holes with a largest hole pitch have a largest distance value.

7. The package substrate of claim 3 , wherein there are at least two conductive bridges between adjacent vent holes.

8. The package substrate of claim 7 , wherein there are at least three conductive bridges between the adjacent vent holes, and distance values between adjacent conductive bridges in the at least three conductive bridges are all equal.

9. The package substrate of claim 3 , wherein the plurality of vent holes comprises a first vent hole, a second vent hole and a third vent hole, the first vent hole, the second vent hole and the third vent hole are disposed in sequence, there are a plurality of conductive bridges between the first vent hole and the second vent hole, and there are a plurality of conductive bridges between the second vent hole and the third vent hole; and
wherein a distance value between adjacent conductive bridges between the first vent hole and the second vent hole is not equal to a distance value between adjacent conductive bridges between the second vent hole and the third vent hole.

10. The package substrate of claim 1 , wherein the body further comprises a solder ball region located outside the opening region, the package substrate further comprises a conductive layer located within the solder ball region; and
a surface of the body comprises a first region and a second region which are distributed in sequence along a length direction of the opening region, the first region and the second region both comprise conductive bridges and the conductive layer, a ratio of a sum of an area of the conductive bridges and an area the conductive layer in the first region to a sum of an area of the conductive bridges and an area of the conductive layer in the second region is less than 1.1, or a ratio of a sum of an area of the conductive bridges and an area the conductive layer in the second region to a sum of an area of the conductive bridges and an area of the conductive layer in the first region is less than 1.1.

11. The package substrate of claim 10 , wherein an area of the conductive bridges in the first region is greater than an area of the conductive bridges in the second region, and an area of the conductive layer in the first region is less than an area of the conductive layer in the second region.

12. The package substrate of claim 1 , wherein the plurality of conductive bridges further comprise:
a second conductive bridge; and
a third conductive bridge,
wherein the first conductive bridge, the second conductive bridge and the third conductive bridge are disposed in sequence, and a distance value between the first conductive bridge and the second conductive bridge is not equal to a distance value between the second conductive bridge and the third conductive bridge.

13. The package substrate of claim 12 , wherein the second conductive bridge is provided with a second through hole, and the third conductive bridge is provided with a third through hole.

14. The package substrate of claim 13 , wherein there are a plurality of first through holes; or, there are a plurality of second through holes; or, there are a plurality of third through holes.

15. The package substrate of claim 13 , wherein the first conductive bridge comprises:
a first bridging section, both ends of the first bridging section being connected to the body;
a second bridging section, both ends of the second bridging section being connected to the body, and the first bridging section and the second bridging section being disposed separately; and
a third bridging section, two ends of the third bridging section being connected with the first bridging section and the second bridging section, respectively;
wherein at least one of the first bridging section, the second bridging section or the third bridging section is provided with the first through hole.

16. The package substrate of claim 1 , wherein the first conductive bridge comprises:
a first bridging section, one end of the first bridging section being connected to the body;
a second bridging section, one end of the second bridging section being connected to the body;
a third bridging section, one end of the third bridging section being connected with the other end of the first bridging section and the other end of the second bridging section, and the other end of the third bridging section being connected to the body;
wherein at least one of the first bridging section, the second bridging section or the third bridging section is provided with the first through hole.

17. A semiconductor structure, comprising a chip and the package substrate of claim 1 .

18. A package substrate, comprising:
a body including an opening region; and
a plurality of conductive bridges comprising a first conductive bridge, a second conductive bridge and a third conductive bridge, the first conductive bridge, the second conductive bridge and the third conductive bridge being disposed in sequence in the opening region; and,
wherein a distance value between the first conductive bridge and the second conductive bridge is not equal to a distance value between the second conductive bridge and the third conductive bridge; and
the first conductive bridge provided with a first through hole.

19. A package substrate, comprising:
a body including an opening region, the opening region comprising a first side wall and a second side wall opposite to each other, and a packaging glue entering the opening region from the first side wall and flowing to the second side wall; and
a plurality of conductive bridges disposed separately in the opening region;
wherein conductive bridges, among the plurality of conductive bridges, close to the first side wall are arranged more densely than conductive bridges, among the plurality of conductive bridges, close to the second side wall; and,
wherein the plurality of conductive bridges comprise: a first conductive bridge provided with a first through hole.

Assignees

• Changxin Memory Tech Inc

Inventors

• Wang Hailin

Classifications

• H10W70/635

  Through-vias · CPC title

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W40/00

  Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W70/65 Primary

  Shapes or dispositions of interconnections · CPC title