Method for determining a manufacturing parameter of a resistive random access memory cell

Patent metadata

Field	Value
Publication number	US-12224007-B2
Application number	US-202017618250-A
Country	US
Kind code	B2
Filing date	Jun 11, 2020
Priority date	Jun 12, 2019
Publication date	Feb 11, 2025
Grant date	Feb 11, 2025

Abstract

A method for determining a value of a manufacturing parameter of a resistive memory cell, the resistive memory cell including a stack of layers, includes providing reference memory cells corresponding to technological alternatives of the stack of layers; measuring for each reference memory cell an initial resistance value; determining for each reference memory cell a programming parameter value selected from among the resistance in a high resistance state and the programming window; establishing a relationship between the programming parameter and the initial resistance from the initial resistance values and the programming parameter values; and determining the manufacturing parameter value for which the programming parameter is greater than or equal to a target value, from the relationship between the programming parameter and the initial resistance and from a dependency relationship between the initial resistance and the manufacturing parameter.

First claim

The invention claimed is:

1. A method for determining at least one value of at least one manufacturing parameter of a resistive memory cell, the resistive memory cell comprising a stack of thin layers, said method comprising:
providing several reference memory cells corresponding to several technological alternatives of the stack of thin layers;
measuring for each reference memory cell an initial resistance value;
determining for each reference memory cell a programming parameter value selected from among the resistance in a high resistance state and a programming window;
establishing an equation that defines a relationship between the programming parameter and the initial resistance from the initial resistance values and from the programming parameter values; and
after establishing said relationship, determining said at least one value of said at least one manufacturing parameter for which the programming parameter is greater than or equal to a target value, from said relationship between the programming parameter and the initial resistance and from at least one dependency relationship between the initial resistance and said at least one manufacturing parameter.

2. The method according to claim 1 , comprising:
determining, from said relationship between the programming parameter and the initial resistance, at least one initial resistance value for which the programming parameter is greater than or equal to the target value; and
after determining said at least one initial resistance value for which the programming parameter is greater than or equal to the target value, determining said at least one value of said at least one manufacturing parameter from said at least one initial resistance value.

3. The method according to claim 1 , wherein the programming parameter is the resistance in the high resistance state and wherein the determining of the values of the programming parameter comprises the following operations:
programming the reference memory cells in the high resistance state;
measuring for each reference memory cell a resistance value in the high resistance state.

4. The method according to claim 3 , wherein the resistance in the high resistance state is a second degree polynomial function of the logarithm of the initial resistance.

5. The method according to claim 1 , wherein the programming parameter is the programming window and wherein the determining of the values of the programming parameter comprises the following operations:
programming the reference memory cells in a low resistance state;
measuring for each reference memory cell a resistance value in the low resistance state;
programming the reference memory cells in the high resistance state;
measuring for each reference memory cell a resistance value in the high resistance state; and
calculating for each reference memory cell a programming window value from the measured resistance values in the low resistance state and the resistance in the high resistance state.

6. The method according to claim 1 , wherein the stack of thin layers comprises a first electrode arranged on a substrate, an oxide layer arranged on the first electrode and a second electrode arranged on the oxide layer and wherein said at least one manufacturing parameter is selected from among a thickness of the second electrode, a thickness of the oxide layer and a proportion of oxygen in the oxide layer.

7. The method for manufacturing a resistive memory cell, comprising:
determining a value of at least one manufacturing parameter, by following a method according to claim 1 ;
forming on a substrate a stack successively comprising a first electrode, an oxide layer and a second electrode, by applying the value of said at least one manufacturing parameter.

8. The method according to claim 7 , wherein the oxide layer is formed of a sub-stoichiometric silicon oxide.

9. The method according to claim 7 , wherein the oxide layer is formed of a porous silicon oxide.

10. The method according to claim 7 , wherein the first electrode is made of titanium nitride and the second electrode is made of titanium.

Assignees

• Commissariat Energie Atomique
• Weebit Nano Ltd

Inventors

• Molas Gabriel
• Piccolboni Guiseppe
• Regev Amir
• Castellan Gaël
• Nodin Jean-François

Classifications

• H10N70/20

  Multistable switching devices, e.g. memristors · CPC title

• H10N70/826

  adapted for essentially vertical current flow, e.g. sandwich or pillar type devices · CPC title

• H10N70/883 Primary

  Oxides or nitrides · CPC title

• H10N70/841

  Electrodes · CPC title

• H10N70/026

  by physical vapor deposition, e.g. sputtering · CPC title