Electrostatic chuck with spatially tunable RF coupling to a wafer

US12191122B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12191122-B2
Application numberUS-202017603636-A
CountryUS
Kind codeB2
Filing dateApr 14, 2020
Priority dateApr 22, 2019
Publication dateJan 7, 2025
Grant dateJan 7, 2025

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A substrate support assembly to support a semiconductor substrate in a processing chamber includes a baseplate arranged in the processing chamber, a dielectric layer arranged on the baseplate to support the semiconductor substrate, an electrode disposed in the dielectric layer along a horizontal plane, and a plurality of channels to carry a fluid. The plurality of channels are disposed in the dielectric layer along the horizontal plane on a side of the electrode facing away from the baseplate.

First claim

Opening claim text (preview).

What is claimed is: 1. A substrate support assembly to support a semiconductor substrate in a processing chamber, the substrate support assembly comprising: a baseplate arranged in the processing chamber; a dielectric layer arranged on the baseplate to support the semiconductor substrate; an electrode disposed in the dielectric layer along a horizontal plane; a first plurality of interconnected channels having an inlet and an outlet that is separate from the inlet to carry a liquid, wherein the first plurality of channels are disposed in the dielectric layer along the horizontal plane on a side of the electrode facing away from the baseplate; and a controller programmed to control liquid level in the first plurality of channels to vary permittivity of material between the electrode and the semiconductor substrate and to adjust amount of power delivered from the electrode to the semiconductor substrate. 2. A system comprising: the substrate support assembly of claim 1 ; a power supply to supply power to the electrode during processing of the semiconductor substrate in the processing chamber; and a source to supply the liquid to fill the first plurality of channels prior to processing the semiconductor substrate. 3. A system comprising: the substrate support assembly of claim 1 ; a plurality of cooling channels disposed in the baseplate; a power supply to supply power to the electrode during processing of the semiconductor substrate in the processing chamber; a source of a coolant to supply the coolant to the cooling channels during the processing of the semiconductor substrate; a plurality of valves in fluid communication with the source, the cooling channels, and the first plurality of channels; and a controller programmed to control the plurality of valves to: supply the coolant from the source to the cooling channels; and supply the coolant as the liquid to fill the first plurality of channels to a first level prior to performing a first process on the semiconductor substrate. 4. The system of claim 3 wherein the controller is further programmed to drain the coolant from the first plurality of channels to a second level after performing the first process and prior to performing a second process on the semiconductor substrate. 5. The system of claim 4 wherein the first level indicates that the first plurality of channels is completely filled with the coolant and wherein the second level indicates that the first plurality of channels is completely empty. 6. A system comprising: the substrate support assembly of claim 1 ; a power supply to supply power to the electrode during processing of the semiconductor substrate in the processing chamber; a source to supply the liquid; a plurality of valves in fluid communication with the source and the first plurality of channels; and a controller programmed to control the plurality of valves to fill the first plurality of channels with the liquid to a first level prior to performing a first process on the semiconductor substrate. 7. The system of claim 6 wherein the controller is further programmed to drain the liquid from the first plurality of channels to a second level after performing the first process and prior to performing a second process on the semiconductor substrate. 8. The system of claim 7 wherein the first level indicates that the first plurality of channels is completely filled with the liquid and wherein the second level indicates that the first plurality of channels is completely empty. 9. A system comprising: the substrate support assembly of claim 1 ; a power supply to supply power to the electrode during processing of the semiconductor substrate in the processing chamber; a source to supply the liquid; a heater associated with the source; and a controller programmed to supply power to the heater to fill the first plurality of channels with the liquid to a first level prior to performing a first process on the semiconductor substrate. 10. The system of claim 9 wherein the controller is further programmed to alter the power supplied to the heater to withdraw the liquid from the first plurality of channels to a second level after performing the first process and prior to performing a second process on the semiconductor substrate. 11. The system of claim 10 wherein the first level indicates that the first plurality of channels is completely filled with the liquid and wherein the second level indicates that the first plurality of channels is completely empty. 12. A system comprising: the substrate support assembly of claim 1 ; a power supply to supply power to the electrode during processing of the semiconductor substrate in the processing chamber; a first source of the liquid; a second source of a fluid; a plurality of valves in fluid communication with the first and second sources and the first plurality of channels; and a controller programmed to control the plurality of valves to: fill the first plurality of channels with the liquid to a first level prior to performing a first process on the semiconductor substrate; drain the liquid from the first plurality of channels after performing the first process; and fill the first plurality of channels with the fluid to a second level prior to performing a second process on the semiconductor substrate. 13. The system of claim 12 wherein the first level is equal to the second level. 14. The system of claim 12 wherein: the first level indicates that the first plurality of channels is completely filled with the liquid, and the second level indicates that the first plurality of channels is completely filled with the fluid; the first level indicates that the first plurality of channels is completely filled with the liquid, and the second level indicates that the first plurality of channels is partially filled with the fluid; the first level indicates that the first plurality of channels is partially filled with the liquid, and the second level indicates that the first plurality of channels is completely filled with the fluid; or the first level indicates that the first plurality of channels is partially filled with the liquid, and the second level indicates that the first plurality of channels is partially filled with the fluid. 15. A system comprising: the substrate support assembly of claim 1 ; a second plurality of channels disposed in the dielectric layer along the horizontal plane on the side of the electrode facing away from the baseplate; a power supply to supply power to the electrode during processing of the semiconductor substrate in the processing chamber; a first source of the liquid; a second source of a fluid; a plurality of valves in fluid communication with the first and second sources, the first plurality of channels, and the second plurality of channels; and a controller programmed to control the plurality of valves to: fill the first plurality of channels with the liquid to a first level prior to performing a process on the semiconductor substrate; and fill the second plurality of channels with the fluid to a second level prior to performing the process on the semiconductor substrate. 16. The system of claim 15 wherein the first level is equal to the second level. 17. The system of claim 15 wherein: the first level indicates that the first plurality of channels is completely filled with the liquid, and the second level indicates that the second plurality of channels is completely filled with the fluid; the first level indicates that the first plurality of channels is comple

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What does patent US12191122B2 cover?
A substrate support assembly to support a semiconductor substrate in a processing chamber includes a baseplate arranged in the processing chamber, a dielectric layer arranged on the baseplate to support the semiconductor substrate, an electrode disposed in the dielectric layer along a horizontal plane, and a plurality of channels to carry a fluid. The plurality of channels are disposed in the d…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P72/0602. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 07 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).