Methods and systems for advanced ion control for etching processes

US12165872B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12165872-B2
Application numberUS-202117196778-A
CountryUS
Kind codeB2
Filing dateMar 9, 2021
Priority dateNov 4, 2015
Publication dateDec 10, 2024
Grant dateDec 10, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A substrate is disposed on a substrate holder within a process module. The substrate includes a mask material overlying a target material with at least one portion of the target material exposed through an opening in the mask material. A plasma is generated in exposure to the substrate. For a first duration, a bias voltage is applied at the substrate holder at a first bias voltage setting corresponding to a high bias voltage level. For a second duration, after completion of the first duration, a bias voltage is applied at the substrate holder at a second bias voltage setting corresponding to a low bias voltage level. The second bias voltage setting is greater than 0 V. The first and second durations are repeated in an alternating and successive manner for an overall period of time necessary to remove a required amount of the target material exposed on the substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A system for controlling ions during a plasma processing operation performed on a substrate, comprising: radiofrequency (RF) synchronization logic configured to control a first bias RF generator, a second bias RF generator, and a coil RF power supply to operate in accordance with a first process state and a second process state and a third process state such that the first, second, and third process states occur in a successive manner and such that a sequence of the first, second, and third process states repeat for an overall period of time, the first process state having the first and second bias RF generators operate to apply a high bias voltage level and the coil RF power supply operate to supply a low power, the second process state having the first and second bias RF generators operate to apply a low bias voltage level and the coil RF power supply operate to supply a high power, the low bias voltage level being greater than zero, the third process state having the first and second bias RF generators operate to apply zero bias voltage. 2. The system as recited in claim 1 , wherein the third process state has the coil RF power supply operate to supply either the low power as supplied in the first process state, or the high power as supplied in the second process state, or a power between the low power as supplied in the first process state and the high power as supplied in the second process state. 3. The system as recited in claim 1 , wherein the high bias voltage level is within a range extending from about 400 V to about 3000 V, and wherein the low bias voltage level is within a range extending from about 20 V to about 300 V. 4. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control the coil RF power supply to supply the low power within a range extending from about 50 Watts (W) to about 2000 W during the first process state, and wherein the RF synchronization logic is configured to control the coil RF power supply to supply the high power within a range extending from about 2000 W to about 5000 W during the second process state. 5. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control one or both of the first and second bias RF generators to transmit RF signals of higher frequency during the first process state, and wherein the RF synchronization logic is configured to control one or both of the first and second bias RF generators to transmit RF signals of lower frequency during the second process state. 6. The system as recited in claim 5 , wherein the RF signals of higher frequency have a frequency within a range extending from about 13 megaHertz (MHz) to about 60 MHz, and wherein the RF signals of lower frequency have a frequency within a range extending from about 400 kiloHertz (kHz) to about 2 MHz. 7. The system as recited in claim 1 , wherein the low bias voltage level is less than a threshold bias voltage required for ion-induced removal of a mask material from a substrate. 8. The system as recited in claim 1 , wherein the first and second bias RF generators apply bias voltage at a substrate holder. 9. The system as recited in claim 8 , wherein a plasma is generated over the substrate holder. 10. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control a duration of the first process state to be at least 1 second and a duration of the second process state to be at least 1 second. 11. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control a duration of the first process state to be less than 100 milliseconds and a duration of the second process state to be less than 100 milliseconds. 12. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control a duration of the first process state to be different than a duration of the second process state. 13. The system as recited in claim 12 , wherein the RF synchronization logic is configured to control a duration of the third process state to be substantially equal to the duration of the first process state or the duration of the second process state. 14. The system as recited in claim 12 , wherein the RF synchronization logic is configured to control a duration of the third process state to be different than each of the duration of the first process state and the duration of the second process state. 15. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control a duration of the first process state to be substantially equal to a duration of the second process state. 16. The system as recited in claim 15 , wherein the RF synchronization logic is configured to control a duration of the third process state to be substantially equal to the duration of the second process state. 17. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control a duration of the first process state to be less than ten percent of a sum of the durations of the first and second process states. 18. The system as recited in claim 1 , wherein the RF synchronization logic is configured to control a duration of the third process state to saturate an etch front on a substrate with a radical flux during the third process state. 19. The system as recited in claim 1 , wherein the RF synchronization logic is configured to operate both the first and second bias RF generators in the first process state, and wherein the RF synchronization logic is configured to operate the second bias RF generator but not the first bias RF generator in the second process state. 20. The system as recited in claim 19 , wherein the second bias RF generator is configured to generate continuous wave RF signals.

Assignees

Inventors

Classifications

  • for drying etching · CPC title

  • for Group V materials or Group III-V materials · CPC title

  • by chemical means · CPC title

  • of materials not containing Si, e.g. PZT or Al2O3 · CPC title

  • by chemical means · CPC title

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What does patent US12165872B2 cover?
A substrate is disposed on a substrate holder within a process module. The substrate includes a mask material overlying a target material with at least one portion of the target material exposed through an opening in the mask material. A plasma is generated in exposure to the substrate. For a first duration, a bias voltage is applied at the substrate holder at a first bias voltage setting corre…
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P50/242. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 10 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).