Metal oxide film and semiconductor device

Patent metadata

Field	Value
Publication number	US-12087825-B2
Application number	US-202318243850-A
Country	US
Kind code	B2
Filing date	Sep 8, 2023
Priority date	Dec 29, 2015
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a first gate electrode over a substrate;
a first oxide semiconductor film over the first gate electrode;
a first source electrode and a first drain electrode over and in electrical contact with the first oxide semiconductor film;
a first conductive film;
a first insulating film over and in contact with a top surface of the first source electrode, a top surface of the first drain electrode, and a top surface of the first conductive film;
a second oxide semiconductor film over the first insulating film;
a second gate electrode over the second oxide semiconductor film;
a second conductive film;
a second insulating film over and in contact with a top surface of the second gate electrode and a top surface of the second conductive film;
a second source electrode and a second drain electrode over and in electrical contact with the second oxide semiconductor film; and
a pixel electrode over and in electrical contact with one of the second source electrode and the second drain electrode,
wherein the first gate electrode and the second conductive film overlap with each other, and
wherein the first conductive film and the second gate electrode overlap with each other.

2. The semiconductor device according to claim 1 , wherein a width of the second conductive film is larger than a width of the second gate electrode in a channel length direction.

3. The semiconductor device according to claim 1 , further comprising a third insulating film between the pixel electrode and the second source electrode.

4. The semiconductor device according to claim 1 , wherein the pixel electrode overlaps the first gate electrode and the second conductive film.

5. The semiconductor device according to claim 1 , wherein the first insulating film is in contact with a top surface of the first oxide semiconductor film.

6. The semiconductor device according to claim 1 , wherein the second insulating film is in contact with a top surface of the second oxide semiconductor film.

7. A semiconductor device comprising:
a first gate electrode over a substrate;
a first oxide semiconductor film over the first gate electrode;
a first source electrode and a first drain electrode over and in electrical contact with the first oxide semiconductor film;
a first conductive film;
a first insulating film over and in contact with a top surface of the first source electrode, a top surface of the first drain electrode, and a top surface of the first conductive film;
a second oxide semiconductor film over the first insulating film;
a second gate electrode over the second oxide semiconductor film;
a second conductive film;
a second insulating film over and in contact with a top surface of the second gate electrode and a top surface of the second conductive film;
a second source electrode and a second drain electrode over and in electrical contact with the second oxide semiconductor film; and
a pixel electrode over and in electrical contact with one of the second source electrode and the second drain electrode,
wherein the first gate electrode and the second conductive film overlap with each other,
wherein the first conductive film and the second gate electrode overlap with each other, and
wherein a width of the first conductive film is larger than a width of the second gate electrode in a channel length direction.

8. The semiconductor device according to claim 7 , wherein a width of the second conductive film is larger than a width of the second gate electrode in the channel length direction.

9. The semiconductor device according to claim 7 , further comprising a third insulating film between the pixel electrode and the second source electrode.

10. The semiconductor device according to claim 7 , wherein the pixel electrode overlaps the first gate electrode and the second conductive film.

11. The semiconductor device according to claim 7 , wherein the first insulating film is in contact with a top surface of the first oxide semiconductor film.

12. The semiconductor device according to claim 7 , wherein the second insulating film is in contact with a top surface of the second oxide semiconductor film.

Assignees

• Semiconductor Energy Lab

Inventors

• Hosaka Yasuharu
• Obonai Toshimitsu
• Shima Yukinori
• Jintyou Masami
• Kurosaki Daisuke
• Hamochi Takashi
• Koezuka Junichi
• Okazaki Kenichi
• Yamazaki Shunpei

Classifications

• H10D86/411

  characterised by materials, geometry or structure of the substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• C23C14/34

  Sputtering · CPC title

• H10D62/875

  being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874) · CPC title

• H10D64/691

  comprising metallic compounds, e.g. metal oxides or metal silicates  (insulators comprising nitrogen H10D64/693) · CPC title