Three electrode capacitor structure using spaced conductive pillars

Patent metadata

Field	Value
Publication number	US-12034039-B2
Application number	US-202117451172-A
Country	US
Kind code	B2
Filing date	Oct 18, 2021
Priority date	Oct 18, 2021
Publication date	Jul 9, 2024
Grant date	Jul 9, 2024

Abstract

A capacitor structure for an integrated circuit (IC) and a related method of forming are disclosed. The capacitor structure includes three electrodes. A planar bottom electrode has a first insulator layer thereover. A middle electrode includes a conductive layer over the first insulator layer and a plurality of spaced conductive pillars contacting the conductive layer. A second insulator layer extends over and between the plurality of spaced conductive pillars and contacts the conductive layer. An upper electrode extends over the second insulator layer, and hence, over and between the plurality of spaced conductive pillars. A length of the upper electrode can be controlled, in part, by the number and dimensions of the conductive pillars to increase capacitance capabilities per area.

First claim

What is claimed is:

1. A capacitor structure for an integrated circuit (IC), the capacitor structure comprising:
a planar bottom electrode;
a first insulator layer over the planar bottom electrode;
a middle electrode including a discontinuous conductive layer over the first insulator layer and a plurality of spaced conductive pillars in contact with the discontinuous conductive layer, wherein each spaced conductive pillar is in contact with a respective discontinuous portion of the discontinuous conductive layer, and wherein the planar bottom electrode extends under an entirety of the middle electrode;
a conductive connector electrically coupled to the plurality of spaced conductive pillars;
a second insulator layer over and between the plurality of spaced conductive pillars and in contact with the discontinuous conductive layer; and
an upper electrode layer over and between the plurality of spaced conductive pillars, wherein the upper electrode layer is discontinuous.

2. The capacitor structure of claim 1 , wherein the planar bottom electrode includes a first capacitor metal, the upper electrode layer and the discontinuous conductive layer includes a different, second capacitor metal, and the plurality of spaced conductive pillars includes a different, third capacitor metal.

3. The capacitor structure of claim 2 , wherein the first capacitor metal includes copper, the second capacitor metal includes a metal selected from a group comprising: titanium nitride (TiN), ruthenium (Ru), and tantalum nitride (TaN), and the third capacitor metal includes aluminum, and wherein the first insulator layer and the second insulator layer each include a dielectric selected from a group comprising: silicon nitride (SiN), tantalum oxide (Ta 2 O 5 ), barium titanium oxide (BaTiO 3 ), hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), hafnium silicate oxide (HfSixOy) or hafnium silicon oxynitride (HfSixOyNz), where x, y, and z represent relative proportions, each greater than or equal to zero.

4. The capacitor structure of claim 1 , further comprising a first contact operatively coupled to the planar bottom electrode, a second contact operatively coupled to the middle electrode, and a third contact operatively coupled to the upper electrode layer.

5. The capacitor structure of claim 4 , wherein the second contact is operatively coupled to one of the plurality of spaced conductive pillars of the middle electrode layer.

6. The capacitor structure of claim 1 , wherein the second insulator layer and the upper electrode layer undulate over the plurality of spaced conductive pillars.

7. The capacitor structure of claim 1 , wherein at least one of the plurality of spaced conductive pillars is contacted on three sides by the second insulator layer.

8. The capacitor structure of claim 1 , wherein the plurality of spaced conductive pillars includes at least two conductive pillars, and wherein the at least two conductive pillars each have a rectangular cross section.

9. A capacitor structure for an integrated circuit (IC), the capacitor structure comprising:
a continuous planar bottom electrode including copper;
a first insulator layer over the planar bottom electrode;
a middle electrode including a conductive layer over the first insulator layer and a plurality of spaced aluminum pillars in contact with the conductive layer,
wherein the continuous planar bottom electrode extends laterally under an entirety of the middle electrode;
a second insulator layer over and between the plurality of spaced aluminum pillars and in contact with the conductive layer; and
an upper electrode layer over and between the plurality of spaced aluminum pillars, wherein the upper electrode layer is discontinuous,
wherein the first insulator layer and the second insulator layer electrically isolate the continuous planar bottom electrode, the middle electrode, and the upper electrode from each other.

10. The capacitor structure of claim 9 , wherein the conductive layer and the upper electrode layer include a metal selected from a group comprising: titanium nitride (TiN), ruthenium (Ru), and tantalum nitride (TaN), and wherein the first insulator layer and the second insulator layer each include a dielectric selected from a group comprising: silicon nitride (SiN), tantalum oxide (Ta 2 O 5 ), barium titanium oxide (BaTiO 3 ), hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), hafnium silicate oxide (HfSixOy) or hafnium silicon oxynitride (HfSixOyNz), where x, y, and z represent relative proportions, each greater than or equal to zero.

11. The capacitor structure of claim 9 , further comprising a first contact operatively coupled to the continuous planar bottom electrode, a second contact operatively coupled to the middle electrode, and a third contact operatively coupled to the upper electrode layer.

12. The capacitor structure of claim 11 , wherein the second contact is operatively coupled to one of the plurality of spaced aluminum pillars of the middle electrode.

13. The capacitor structure of claim 9 , wherein the second insulator layer and the upper electrode layer undulate over the plurality of spaced aluminum pillars.

14. The capacitor structure of claim 9 , wherein at least one of the plurality of spaced aluminum pillars is contacted on three sides by the second insulator layer.

15. The capacitor structure of claim 9 , wherein the plurality of spaced aluminum pillars includes at least two aluminum pillars, and wherein the at least two aluminum pillars each have a rectangular cross section.

16. A method of forming a three-electrode capacitor structure for an integrated circuit, the method comprising:
forming a continuous planar bottom electrode in a dielectric layer;
forming a first insulator layer over the planar bottom electrode;
forming a middle electrode by forming a conductive layer over the first insulator layer and forming a plurality of spaced aluminum pillars in contact with the conductive layer, the conductive layer physically separating a bottom of each aluminum pillar in the plurality of spaced aluminum pillars from the first insulator layer;
wherein the continuous planar bottom electrode extends laterally under an entirety of the middle electrode;
forming a second insulator layer over and between the plurality of spaced aluminum pillars and over the conductive layer; and
forming an upper electrode layer over the second insulator layer, the upper electrode layer extending over and between the plurality of spaced aluminum pillars, wherein the upper electrode layer is discontinuous;
wherein the second insulator layer and the upper electrode layer undulate over the plurality of spaced aluminum pillars, and
wherein the first insulator layer and the second insulator layer electrically isolate the continuous planar bottom electrode, the middle electrode, and the upper electrode from each other.

17. The method of claim 16 , wherein forming the middle electrode includes:
forming the conductive layer over the continuous planar bottom electrode;
forming an aluminum layer over the conductive layer;
patterning the aluminum layer to form the plurality of spaced aluminum pillars.

18. The method of claim 16 , further comprising forming a third insulator layer over the upper layer electrode, the third insulator layer extending over and between the plurality of spaced aluminum pillars.

19. The method of claim 16 , wherein the continuous planar bottom electrode includes copper, and the upper electrode layer and the c

Assignees

• Globalfoundries Sg Pte Ltd

Inventors

• Khor Eejan
• Chockalingam Ramasamy
• Tan Juan Boon

Classifications

• H10D1/716

  having vertical extensions · CPC title

• H10D1/042

  using deposition processes to form electrode extensions · CPC title

• H10D1/692

  Electrodes · CPC title

• H10D1/696

  comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title

• H10D1/043 Primary

  using patterning processes to form electrode extensions, e.g. etching · CPC title