Imidazolidinethione-containing compositions for post-ash residue removal and/or for oxidative etching of a layer or mask comprising TiN

US12024693B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12024693-B2
Application numberUS-201917044989-A
CountryUS
Kind codeB2
Filing dateMar 25, 2019
Priority dateApr 4, 2018
Publication dateJul 2, 2024
Grant dateJul 2, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Described herein is a cleaning composition for post-etch or post-ash residue removal from the surface of a semiconductor substrate and a corresponding use of said cleaning composition. Further described is the use of said cleaning composition in combination with one or more oxidants, e.g. for oxidative etching or partial oxidative etching of a layer or mask, comprising or consisting of TiN, preferably in the presence of a tungsten material, on the surface of a semiconductor substrate, and/or for post-etch or post-ash residue removal from the surface of a semiconductor substrate. Moreover, it is described a wet-etch composition comprising the cleaning composition of the present invention and one or more oxidants, the use of said wet-etch composition for oxidative etching or partial oxidative etching of a layer or mask, comprising or consisting of TiN, preferably in the presence of a tungsten material, on the surface of a semiconductor substrate, and/or for post-etch or post-ash residue removal from the surface of a semiconductor substrate, a process for the manufacture of a semiconductor device from a semiconductor substrate using said wet-etch composition and a kit comprising the cleaning composition of the present invention and one or more oxidants. Furthermore, it is described the use of an imidazolidinethione in a composition for etching or partially etching of a layer or mask on the surface of a semiconductor substrate and/or for cleaning a semiconductor substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A cleaning composition for post-etch or post-ash residue removal from the surface of a semiconductor substrate, comprising: one or more sulfonic acids, selected from the group consisting of methane sulfonic acid, ethanesulfonic acid, propanesulfonic acid, butanesulfonic acid, hexanesulfonic acid, 3-(N-morpholino)propane sulfonic acid, 2-(N-morpholino)ethanesulfonic acid, N-cyclohexyl-2-aminoethanesulfonic acid, 3-[4-(2-hydroxyethyl)-1-piperazinyl] propanesulfonic acid, N-cyclohexyl-3-aminopropanesulfonic acid, and mixtures thereof; one or more polar, non-protogenic organic solvents, selected from the group consisting of dimethyl formamide, dimethyl sulfoxide, dimethylacetamide, N-methylpyrrolidone, propylene carbonate, sulfolane, tetrahydrofuran, and mixtures thereof, one or more glycol ethers, selected from the group consisting of 1,1-dimethoxyethane, 1-methoxy-2-butanol, 2-(2-butoxyethoxy) ethanol, 2-(naphthalene-6-yloxy)polyethoxyethanol, 2-(hexyloxy)ethanol, 2-methoxy-1-butanol, 2-methoxy-2-methylbutanol, butyl diglycol, diethylene glycol diethyl ether, diethylene glycol dimethyl ether, diethylene glycol methyl ethyl ether, diethylene glycol monobenzyl ether, diethylene glycol monobutyl ether, diethylene glycol monoethyl ether, diethylene glycol monoisobutyl ether, diethylene glycol monoisopropyl ether, diethylene glycol monomethyl ether, diethylene glycol monopropyl ether, dipropylene glycol diisopropyl ether, dipropylene glycol monoisopropyl ether, dipropylene glycol monomethyl ether, dipropylene glycol monopropyl ether, dipropylenemonobutyl ether, ethylene glycol diethyl ether, ethylene glycol dimethyl ether, ethylene glycol monobutyl ether, ethylene glycol monoethyl ether acetate, ethylene glycol monoethyl ether, ethylene glycol monomethyl ether, monopropyl ether, polyethylene glycol monomethyl ether, propylene glycol dimethyl ether, propylene glycol monobutyl ether, propylene glycol monomethyl ether, propylene glycol, tetrahydrofurfurylalcohol, triethylene glycol dimethyl ether, triethylene glycol ethylene glycol monomethyl ether acetate, triethylene glycol monomethyl ether, tripropylene glycol monomethyl ether, and mixtures thereof, one or more imidazolidinethiones, and water. 2. The cleaning composition of claim 1 , wherein the one or more sulfonic acids is methane sulfonic acid, and/or the total amount of the one or more sulfonic acids is in the range of from 0.01 wt.-% to 10 wt.-%, based on the total weight of the cleaning composition. 3. The cleaning composition of claim 1 , wherein the one or more polar, non-protogenic organic solvents is sulfolane, and/or the total amount of the one or more polar, non-protogenic organic solvents is in the range of from 1 wt.-% to 25 wt.-%, based on the total weight of the cleaning composition. 4. The cleaning composition of claim 1 , wherein the one or more glycol ethers is butyl diglycol, and/or the total amount of the one or more glycol ethers is in the range of from 10 wt.-% to 50 wt.-%, based on the total weight of the cleaning composition. 5. The cleaning composition of claim 1 , wherein the one or more imidazolidinethiones is 2-imidazolidinethione, and/or the total amount of the one or more imidazolidinethiones is in the range of from 0.05 wt.-% to 10 wt.-%, based on the total weight of the cleaning composition. 6. The cleaning composition of claim 1 , comprising wherein: the one or more sulfonic acids is methane sulfonic acid, the one or more polar, non-protogenic organic solvents is sulfolane, the one or more glycol ethers is butyl diglycol, and the one or more imidazolidinethiones is 2-imidazolidinethione. 7. A method of cleaning with the cleaning composition of claim 1 , comprising: contacting a surface of a semiconductor substrate to remove a post-etch or post-ash residue from the surface of the semiconductor substrate; and/or contacting a semiconductor substrate comprising a tungsten material and/or a low-k material to clean the semiconductor substrate; and/or contacting a surface of a semiconductor substrate comprising a tungsten material and/or a low-k material to remove a residue or a contaminant. 8. The method of claim 7 , wherein the cleaning composition is used in combination with one or more oxidants, and the method further comprises: oxidative etching or partially oxidative etching of a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or removing or partially removing a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or recessing a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or pulling back a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or removing post-etch or post-ash residue from the surface of the semiconductor substrate. 9. The method of claim 8 , wherein: the cleaning composition is used in combination with the one or more oxidants in a separate step or simultaneously in the same step; and/or the one or more oxidants are selected from the group consisting of hydrogen peroxide, peroxide urea, peroxydisulfuric acid, ammonium persulfate, peroxymonosulfuric acid, pyrosulfuric acid, ozone, and mixtures thereof; and/or the one or more oxidants are used in a total amount in the range of from 0.3 wt-% to 10.0 wt.-% based on the total weight of the cleaning composition; and/or one or more stabilizers are used in combination with the one or more oxidants and/or in combination with the cleaning composition. 10. A wet-etch composition, comprising: the cleaning composition of claim 1 , and one or more oxidants. 11. The wet-etch composition of claim 10 , which has a pH in the range of from 1 to 4; and/or wherein the wet-etch composition further comprises one or more stabilizers. 12. A method of cleaning with the wet-etch composition of claim 10 , comprising: contacting a surface of a semiconductor substrate with the wet-etch composition for oxidative etching or partially oxidative etching of a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or contacting a surface of a semiconductor substrate with the wet-etch composition for removing or partially removing a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or contacting a surface of a semiconductor substrate with the wet-etch composition for recessing a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or contacting a surface of a semiconductor substrate with the wet-etch composition for pulling back a layer or mask, comprising TiN, on the surface of the semiconductor substrate; and/or contacting a surface of a semiconductor substrate with the wet-etch composition for removing post-etch or post-ash residue from the surface of the semiconductor substrate; and/or contacting a surface of a semiconductor substrate with the wet-etch composition, the semiconductor substrate comprising a tungsten material and/or a low-k material; and/or contacting a surface of a semiconductor substrate with the wet-etch composition for removing residues and contaminants from the surface of the semiconductor substrate, the semiconductor substrate comprising a tungsten material and/or a low-k material. 13. A process for manufacturing a semiconductor device from a semiconductor substrate, comprising: contacting a layer or mask comprising TiN on a surface of the semiconductor substrate at least once with the wet-etch composition according to claim 10 , wherein the contacting selectively oxidatively etch

Assignees

Inventors

Classifications

  • Electronic devices, e.g. PCBs or semiconductors · CPC title

  • containing organic halogen compounds; containing organic sulfonic acids or salts thereof; containing sulfoxides · CPC title

  • containing phosphorus, sulfur or silicon, e.g. dimethylsulfoxide · CPC title

  • Heterocyclic compounds · CPC title

  • Ethers · CPC title

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What does patent US12024693B2 cover?
Described herein is a cleaning composition for post-etch or post-ash residue removal from the surface of a semiconductor substrate and a corresponding use of said cleaning composition. Further described is the use of said cleaning composition in combination with one or more oxidants, e.g. for oxidative etching or partial oxidative etching of a layer or mask, comprising or consisting of TiN, pre…
Who is the assignee on this patent?
Basf Se
What technology area does this patent fall under?
Primary CPC classification C09K13/00. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Jul 02 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).