Storage device and temperature control of electronic device including the same

Patent metadata

Field	Value
Publication number	US-11966207-B2
Application number	US-202217877332-A
Country	US
Kind code	B2
Filing date	Jul 29, 2022
Priority date	Jul 24, 2017
Publication date	Apr 23, 2024
Grant date	Apr 23, 2024

Abstract

An electronic device, which includes a host, and a storage device receiving a command from the host. The storage device processes the received command and returns, to the host, a command response indicating a result of processing the received command, and the command response includes information about an internal temperature of the storage device.

First claim

What is claimed is:

1. A method for adjusting a temperature of a Universal Flash Storage, comprising:
storing a value of an upper limit temperature and a value of a lower limit temperature of the Universal Flash Storage,
measuring the temperature of the Universal Flash Storage by a sensor in the Universal Flash Storage,
setting a value of a first bit when the temperature of the Universal Flash Storage is higher than the upper limit temperature,
setting a value of a second bit when the temperature of the Universal Flash Storage is lower than the lower limit temperature,
receiving a request from an application processor,
reporting the value of a first bit or the value of a second bit to the application processor in response to receiving the request from the application processor, and
thermal throttling for adjusting the temperature of the Universal Flash Storage based on temperature information including the values of the first bit and the second bit.

2. The method of claim 1 further comprising,
setting the value of the first bit to one when the temperature of the Universal Flash Storage is higher than the upper limit temperature, and
setting the value of the second bit to one when the temperature of the Universal Flash Storage is lower than the lower limit temperature.

3. The method of claim 1 further comprising,
setting the value of the first bit to zero when the temperature of the Universal Flash Storage is not higher than the upper limit temperature, and
setting the value of the second bit to zero when the temperature of the Universal Flash Storage is not lower than the lower limit temperature.

4. The method of claim 2 further comprising,
defining a temperature range by the lower limit temperature and the upper limit temperature with a grade of the Automotive Electronics Council (AEC).

5. The method of claim 4 further comprising,
defining the temperature range by the lower limit temperature and the upper limit temperature with a grade 3 of the AEC.

6. A non-transitory storage device, comprising:
a non-volatile memory device configured to store data;
a controller configured to store a value of an upper limit temperature and a value of a lower limit temperature, and to output a value of a first bit and a value of a second bit to an application processor in response to a request received from the application processor, and
a sensor configured to measure a temperature of the non-transitory storage device,
the non-volatile memory device and the controller being configured for installation in a vehicle,
wherein the controller comprises:
a first register configured to manage the value of the upper limit temperature;
a second register configured to manage the value of the lower limit temperature; and
wherein the controller is further configured to set the value of the first bit to one when a temperature of the non-transitory storage device is higher than the upper limit temperature and to set the value of the second bit to one when the temperature of the non-transitory storage device is lower than the lower limit temperature, and
wherein the controller is further configured to output a response to the request of the application processor, the response comprising the value of the first bit and the value of the second bit.

7. The non-transitory storage device of claim 6 , wherein the sensor senses the temperature of a case of the non-transitory storage device.

8. The non-transitory storage device of claim 6 , wherein the value of the first bit is zero when the temperature of the non-transitory storage device is not higher than the upper limit temperature, and the value of the second bit is zero when the temperature of the non-transitory storage device is not lower than the lower limit temperature.

9. The non-transitory storage device of claim 8 , wherein a temperature range defined by the lower limit temperature and the upper limit temperature includes −40° C. to 85° C.

10. The non-transitory storage device of claim 8 , wherein a temperature range defined by the lower limit temperature and the upper limit temperature is compliant with a grade of the Automotive Electronics Council (AEC).

11. The non-transitory storage device of claim 10 , wherein a temperature range defined by the lower limit temperature and the upper limit temperature is compliant with a grade 3 of the AEC.

12. The non-transitory storage device of claim 10 , wherein the non-transitory storage device is cooled by a throttling operation of the application processor, based on information including the value of the first bit that is output from the non-transitory storage device to the application processor.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yum Ho-Suk
• Cho Heechang

Classifications

• G05B19/042 Primary

  using digital processors (G05B19/05 takes precedence) · CPC title

• G06F1/206 Primary

  comprising thermal management · CPC title

• G05B2219/21156

  Over temperature protection · CPC title

• G06F3/0679 Primary

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0614

  Improving the reliability of storage systems · CPC title