Method of fabricating a semiconductor package

Patent metadata

Field	Value
Publication number	US-11776882-B2
Application number	US-202217712375-A
Country	US
Kind code	B2
Filing date	Apr 4, 2022
Priority date	Oct 31, 2018
Publication date	Oct 3, 2023
Grant date	Oct 3, 2023

Abstract

A method includes: arranging a semiconductor device on a redistribution substrate, the device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, the redistribution substrate having an insulating board having a first major surface and a second major surface having solderable contact pads, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface; arranging a contact clip such that a web portion is arranged on the second power electrode and a peripheral rim portion is arranged on a third conductive pad on the first major surface; and electrically coupling the first power electrode, control electrode and peripheral rim portion to the respective conductive pads and electrically coupling the web portion to the second power electrode.

First claim

What is claimed is:

1. A method of fabricating a semiconductor package, the method comprising:
arranging a semiconductor device on a redistribution substrate, the semiconductor device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface opposite the first surface, the redistribution substrate comprising an insulating board having a first major surface and a second major surface having solderable contact pads that form a package footprint, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface of the insulating board;
arranging a contact clip comprising a web portion and one or more peripheral rim portions on the semiconductor device such that the web portion is arranged on the second power electrode and the peripheral rim portion is arranged on a third conductive pad on the first major surface of the insulating board;
electrically coupling the first power electrode, the control electrode and the peripheral rim portion to the respective conductive pads on the first major surface of the redistribution substrate and electrically coupling the web portion to the second power electrode; and
mounting the first power electrode and the control electrode on the first major surface of the insulating board by an insulating adhesive.

2. The method of claim 1 , further comprising:
applying solder to the first conductive pad, the second conductive pad, and the third conductive pad;
arranging the first power electrode on the solder positioned on the first conductive pad and the control electrode on the solder positioned on the second conductive pad;
applying solder to the second power electrode;
applying the web portion of the contact clip to the solder positioned on the second power electrode and the peripheral rim of the contact clip on the solder positioned on the third conductive pad and forming an assembly; and
heating to above the melting point of the solder and electrically coupling the first power electrode, the control electrode, and the peripheral rim portion to the respective conductive pads on the first major surface of the redistribution substrate and electrically coupling the web portion of the contact clip to the second power electrode.

3. The method of claim 1 , wherein the first, second and third conductive pads are each electrically coupled by a conductive via to first, second and third solderable contact pads, respectively, on the second major surface of the insulating board such that heating electrically couples the first power electrode to the first solderable contact pad, the control electrode to the second solderable contact pad, and the second power electrode to the third solderable contact pad.

4. The method of claim 1 , wherein the redistribution substrate comprises an aperture extending from the first major surface to the second major surface, the method further comprising:
arranging the first power electrode or the control electrode or the peripheral rim portion of the contact clip on the first major surface so that the first power electrode or the control electrode or the peripheral rim portion forms a base of the aperture;
inserting solder into the aperture such that the solder is positioned on the first power electrode or the control electrode or the peripheral rim portion, on at least side faces of the aperture and on a solderable contact pad on the second major surface of the redistribution substrate; and
melting the solder to electrically couple the first power electrode or the control electrode or the peripheral rim portion to the solderable contact pad.

5. The method of claim 1 , wherein the redistribution substrate further comprises at least one conductive via extending from the first major surface to the second major surface, the method further comprising:
electrically coupling, by the at least one conductive via, a conductive pad on the first major surface with at least one of the plurality of solderable outer contact pads on the second major surface.

6. The method of claim 1 , further comprising electrically coupling a further semiconductor device with the semiconductor device by the contact clip to form a circuit.

7. The method of claim 6 , wherein the further semiconductor device comprises a freewheeling diode or a transistor coupled in a half bridge configuration with the semiconductor device.

8. The method of claim 1 , wherein the redistribution substrate comprises a first aperture and a second aperture both extending from the first major surface to the second major surface, the method further comprising:
arranging the first power electrode and the control electrode on the first major surface so that the first power electrode forms a base of the first aperture and the control electrode forms a base of the second aperture;
inserting first solder into the first aperture such that the first solder is positioned on the first power electrode, on at least side faces of the first aperture and on a first solderable contact pad on the second major surface of the redistribution substrate;
inserting second solder into the second aperture such that the second solder is positioned on the control electrode, on at least side faces of the second aperture and on a second solderable contact pad on the second major surface of the redistribution substrate; and
melting the first solder to electrically couple the first power electrode to the first solderable contact pad and melting the second solder to electrically couple the control electrode to the second solderable contact pad.

9. The method of claim 8 , wherein the first solderable contact pad has a split structure with portions arranged adjacent the side faces of the first aperture on the second major surface of the insulating board.

10. The method of claim 8 , wherein the second solderable contact pad has a split structure with portions arranged adjacent the side faces of the second aperture on the second major surface of the insulating board.

11. The method of claim 1 , wherein at least two conductive vias extend between the third conductive pad on the upper surface of the insulating board and a solderable contact pad arranged on the second major surface of the insulating board.

12. The method of claim 11 , wherein each of the at least two conductive vias is filled by one or more metals or alloys.

13. The method of claim 1 , wherein the redistribution substrate comprises an aperture extending from the first major surface to the second major surface, the method further comprising:
arranging the peripheral rim portion of the contact clip on the first major surface so that the peripheral rim portion forms a base of the aperture;
inserting solder into the aperture such that the solder is positioned on the peripheral rim portion, on at least side faces of the aperture and on a solderable contact pad on the second major surface of the redistribution substrate; and
melting the solder to electrically couple the peripheral rim portion to the solderable contact pad.

14. The method of claim 13 , wherein the solderable contact pad has a split structure with portions arranged adjacent the side faces of the aperture on the second major surface of the insulating board.

15. The method of claim 13 , wherein the solderable contact pad is in direct contact with a conductive lining on the side faces of the aperture.

16. The method of claim 13 , wherein the solder is positioned within and fills the aperture such that the solder extends through an entire thickness

Assignees

• Infineon Technologies Austria Ag

Inventors

• Dinkel Markus
• Palm Petteri
• Cho Eung San
• Hoeglauer Josef
• Otremba Ralf
• Schnoy Fabian

Classifications

• H10W90/794

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/07236

  Soldering or alloying · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title