Chip package and method of forming a chip package

US11735534B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11735534-B2
Application numberUS-202117333186-A
CountryUS
Kind codeB2
Filing dateMay 28, 2021
Priority dateMay 29, 2020
Publication dateAug 22, 2023
Grant dateAug 22, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.

First claim

Opening claim text (preview).

The invention claimed is: 1. A chip package, comprising: at least one chip; an exposed metal region; a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation, the protection layer structure comprising a low-temperature deposited oxide; and a hydrothermally converted metal oxide layer over the protection layer structure. 2. The chip package according to claim 1 , wherein the low-temperature deposited oxide comprises or consists of a metal oxide. 3. The chip package according to claim 1 , wherein the hydrothermally converted metal oxide layer comprises or consists of an aluminum hydroxide layer. 4. The chip package according to claim 1 , wherein the metal protection layer structure comprises a top layer comprising at least one of a group of materials, the group consisting of: silicon dioxide; titanium dioxide; zinc oxide; hafnium dioxide; tantalum pentoxide; and zirconium dioxide. 5. The chip package according claim 4 , wherein the metal protection layer structure comprises an aluminum oxide layer between the top layer and the exposed metal region. 6. The chip package according to claim 1 , wherein the metal protection layer structure comprises aluminum oxide with a top layer of doped aluminum oxide. 7. The chip package according to claim 1 , wherein the exposed metal region comprises at least one of a group of metal regions, the group consisting of: a chip pad; a leadframe; a wire bond; a clip; and a stripe bond. 8. The chip package according to claim 1 , wherein the exposed metal region comprises at least one of a group of materials, the group consisting of: copper (Cu); nickel (Ni); nickel-phosphorus (NiP); aluminum (Al); gold (Au); silver (Ag); palladium (Pd); and alloys thereof, for example PdAuAg. 9. The chip package according to claim 1 , further comprising: an encapsulation material attached to at least a portion of the exposed metal region by the metal protection layer structure and the hydrothermally converted metal oxide layer. 10. The chip package according to claim 9 , further comprising: a non-metal layer; wherein the encapsulation material is further attached to at least a portion of the non-metal layer. 11. The chip package according to claim 1 , wherein the metal protection layer structure forms a hydrolysis stopping layer. 12. The chip package according to claim 1 , wherein the metal protection layer structure is an adhesion layer structure. 13. A chip package, comprising: at least one chip; an exposed metal region; a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation, the protection layer structure comprising a low-temperature deposited oxide; a hydrothermally converted metal oxide layer over the protection layer structure; and an aluminum oxide layer between the metal protection layer structure and the hydrothermally converted metal oxide layer. 14. A method of forming a chip package comprising a chip and an exposed metal region, the method comprising: forming a metal protection layer structure over the exposed metal region, wherein the metal protection layer structure is configured to protect the metal region from oxidation, wherein the forming the protection layer structure comprises low-temperature depositing an oxide; and forming a hydrothermally converted metal oxide layer over the protection layer structure. 15. The method according to claim 14 , wherein the low-temperature deposited oxide comprises or consists of a metal oxide. 16. The method according to claim 14 , wherein the hydrothermally converted metal oxide layer comprises or consists of an aluminum hydroxide layer. 17. The method according to claim 14 , wherein forming the metal protection layer structure comprises forming a top layer comprising at least one of a group of materials, the group consisting of: silicon dioxides, hafnium dioxide; titanium dioxide; zinc oxide; tantalum pentoxide; and zirconium dioxide. 18. The method according to claim 14 , wherein the forming the metal protection layer structure comprises: forming an aluminum oxide layer; and doping a top layer of the aluminum oxide layer. 19. The method according to claim 14 , further comprising: forming an encapsulation material attached to at least a portion of the exposed metal region by the metal protection layer structure and the hydrothermally converted metal oxide layer. 20. The method according to claim 14 , wherein the forming the hydrothermally converted metal oxide layer over the protection layer structure comprises: forming a metal oxide layer over the protection layer; and placing the metal oxide layer in a heated aqueous solution.

Assignees

Inventors

Classifications

  • not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids · CPC title

  • Bond pads having multiple stacked layers · CPC title

  • of bond pads · CPC title

  • characterised by arrangements for sealing or adhesion · CPC title

  • Manufacture or treatment · CPC title

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Frequently asked questions

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What does patent US11735534B2 cover?
A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W42/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 22 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).