Method for manufacturing wiring board

Patent metadata

Field	Value
Publication number	US-11700686-B2
Application number	US-202117366417-A
Country	US
Kind code	B2
Filing date	Jul 2, 2021
Priority date	Jul 6, 2020
Publication date	Jul 11, 2023
Grant date	Jul 11, 2023

Abstract

A method for manufacturing a wiring board capable of improving adhesion between an underlayer and a seed layer. An electrically conductive underlayer is disposed on the surface of an insulating substrate and a seed layer containing metal is disposed on the surface of the underlayer to prepare a substrate with seed-layer. A diffusion layer in which elements forming the underlayer and seed layer are mutually diffused is formed between the underlayer and the seed layer, by irradiating the seed layer with a laser beam. A metal layer is formed on the surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from the insulating substrate.

First claim

What is claimed is:

1. A method for manufacturing a wiring board including an insulating substrate, and a wiring layer disposed on a surface of the insulating substrate and having a predetermined wiring pattern, the method comprising:
preparing a substrate with seed-layer including an electrically conductive underlayer on the surface of the insulating substrate and a seed layer on a surface of the underlayer, the seed layer having a predetermined pattern corresponding to the wiring pattern and containing metal;
forming a diffusion layer in which an element forming the underlayer and an element forming the seed layer are mutually diffused, between the underlayer and the seed layer, by irradiating the seed layer with a laser beam;
forming a metal layer on a surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode, pressing the solid electrolyte membrane against at least the seed layer, and applying voltage between the anode and the underlayer to reduce metal ions contained in the solid electrolyte membrane;
forming the wiring layer by removing, from the insulating substrate, an exposed portion of the underlayer that is not located under the seed layer; and

wherein
the seed layer contains metallic nanoparticles,
in preparing the substrate with seed-layer, ink in which the metallic nanoparticles are dispersed in a dispersion medium is applied onto the underlayer in the predetermined pattern and the applied ink is then dried so as to form the seed layer, and
the ink is dried until an amount of the dispersion medium remaining in the seed layer is reduced to 0.1 mass % or less relative to the seed layer.

2. The method for manufacturing the wiring board according to claim 1 , wherein
the element forming the seed layer is a noble metal element,
the underlayer of the prepared substrate with seed-layer contains an oxide on a contacting surface where the underlayer contacts the seed layer, and
in forming the diffusion layer, a diffusion layer in which oxygen originating from the oxide is diffused is formed as the diffusion layer by irradiating the seed layer with the laser beam.

Assignees

• Toyota Motor Co Ltd

Inventors

• Kuroda Keiji
• Kondoh Haruki
• Okamoto Kazuaki
• Mori Rentaro
• Yanagimoto Hiroshi

Classifications

• H05K2201/0338

  Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer · CPC title

• H05K1/097

  Inks comprising nanoparticles and specially adapted for being sintered at low temperature (H05K1/095 takes precedence) · CPC title

• H05K1/0298 Primary

  Multilayer circuits · CPC title

• H05K3/388

  by the use of a metallic or inorganic thin film adhesion layer · CPC title

• H05K3/027

  the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles · CPC title