Organic light emitting diode display with plurality of thin film transistors in portions of curved semiconductor layer

Patent metadata

Field	Value
Publication number	US-11690266-B2
Application number	US-202217853368-A
Country	US
Kind code	B2
Filing date	Jun 29, 2022
Priority date	Aug 2, 2012
Publication date	Jun 27, 2023
Grant date	Jun 27, 2023

Abstract

An organic light emitting diode display includes a substrate, a scan line on the substrate for transferring a scan signal, a data line crossing the scan line and for transferring a data signal, a driving voltage line crossing the scan line and for transferring a driving voltage, a switching thin film transistor coupled to the scan line and the data line, a driving thin film transistor coupled to a switching drain electrode of the switching thin film transistor, and an organic light emitting diode (OLED) coupled to a driving drain electrode of the driving thin film transistor, wherein a driving semiconductor layer of the driving thin film transistor is bent and in a plane substantially parallel to the substrate.

First claim

What is claimed is:

1. An organic light emitting diode display comprising:
a substrate;
a plurality of first voltage lines;
a plurality of scan lines;
a plurality of data lines;
a plurality of driving circuits formed on the substrate; and
a plurality of organic light emitting diodes, each of the organic light emitting diodes being electrically coupled to a respective driving circuit,
wherein each of the driving circuits comprises:
a first thin film transistor implemented in a first portion of a semiconductor layer and coupled to one of the scan lines and to one of the plurality of data lines;
a second thin film transistor implemented in a second portion of the semiconductor layer and electrically coupled to one of the first voltage lines and one of the organic light emitting diodes, the semiconductor layer electrically coupling the second thin film transistor to the first thin film transistor, the second portion of the semiconductor layer having a curved portion in a channel region of the second thin film transistor;
a gate insulating layer covering the second portion of the semiconductor layer;
a storage capacitor electrically coupled to a gate electrode of the second thin film transistor, the storage capacitor comprising:
a first capacitor plate comprising the gate electrode of the second thin film transistor;
a second capacitor plate overlapping the first capacitor plate; and
an insulating layer between the first capacitor plate and the second capacitor plate, the insulating layer covering the second thin film transistor; and

a third thin film transistor implemented in a third portion of the semiconductor layer and electrically coupled to the one of the organic light emitting diodes and the first capacitor plate, the semiconductor layer electrically coupling the third thin film transistor to the second thin film transistor, and

wherein the curved portion of the second portion of the semiconductor layer is under the gate electrode of the second thin film transistor and is covered by the first capacitor plate.

2. The organic light emitting diode display according to claim 1 , further comprising a fourth thin film transistor implemented in a fourth portion of the semiconductor layer and electrically coupled to the one of the first voltage lines,
wherein the semiconductor layer electrically couples the fourth thin film transistor to the second thin film transistor.

3. The organic light emitting diode display according to claim 2 , further comprising a fifth thin film transistor implemented in a fifth portion of the semiconductor layer and electrically coupled to the one of the organic light emitting diodes,
wherein the semiconductor layer electrically couples the fifth thin film transistor to the second thin film transistor.

4. The organic light emitting diode display according to claim 3 , further comprising:
a plurality of second voltage lines; and
a sixth thin film transistor implemented in a sixth portion of the semiconductor layer and electrically coupled to one of the second voltage lines and the first capacitor plate,
wherein the semiconductor layer electrically couples the sixth thin film transistor to the third thin film transistor.

5. The organic light emitting diode display according to claim 4 , further comprising:
a seventh thin film transistor implemented in a seventh portion of the semiconductor layer and electrically coupled to the one of the second voltage lines and the one of the organic light emitting diodes,
wherein the semiconductor layer electrically couples the seventh thin film transistor to the fifth thin film transistor.

6. The organic light emitting diode display according to claim 3 , wherein gate electrodes of the fourth and fifth thin film transistors are coupled together and are configured to receive a signal from one of a plurality of light emission control lines.

7. The organic light emitting diode display according to claim 4 , wherein a gate electrode of the sixth thin film transistor is configured to receive a signal from one of a plurality of second scan lines.

8. The organic light emitting diode display according to claim 1 , wherein gate electrodes of the first and third thin film transistors are coupled together and are configured to receive a signal from one of the scan lines.

9. The organic light emitting diode display according to claim 1 , wherein the second capacitor plate is electrically coupled to the one of the first voltage lines.

10. The organic light emitting diode display according to claim 9 , wherein a periphery of the second capacitor plate completely surrounds a periphery of the first capacitor plate in a plan view.

11. The organic light emitting diode display according to claim 1 , wherein portions of the semiconductor layer are doped with N-type impurities.

12. The organic light emitting diode display according to claim 1 , wherein portions of the semiconductor layer are doped with P-type impurities.

13. The organic light emitting diode display according to claim 5 , wherein a gate electrode of the seventh thin film transistor is configured to receive a signal from one of a plurality of bypass control lines.

14. The organic light emitting diode display according to claim 1 , further comprising a protective layer covering the plurality of driving circuits,
wherein each of the organic light emitting diodes further comprises a pixel electrode on the protective layer, the pixel electrode being electrically coupled to the second thin film transistor through a contact hole.

15. The organic light emitting diode display according to claim 3 , further comprising a protective layer covering the plurality of driving circuits,
wherein each of the organic light emitting diodes further comprises a pixel electrode on the protective layer, the pixel electrode being electrically coupled to a drain electrode of the fifth thin film transistor through a contact hole.

16. The organic light emitting diode display according to claim 1 , wherein the first capacitor plate and the one of the scan lines are in the same material layer.

17. The organic light emitting diode display according to claim 1 , wherein the curved portion of the second portion of the semiconductor layer has a “S”-shape.

18. The organic light emitting diode display according to claim 1 , wherein the curved portion of the semiconductor layer has a partial “S”-shape.

19. The organic light emitting diode display according to claim 1 , wherein the curved portion of the second portion of the semiconductor layer has a “M”-shape.

20. The organic light emitting diode display according to claim 1 , wherein the curved portion of the second portion of the semiconductor layer has a “W”-shape.

21. The organic light emitting diode display according to claim 1 , wherein the third thin film transistor is electrically coupled to the gate electrode and a drain electrode of the second thin film transistor.

22. The organic light emitting diode display according to claim 1 , wherein the third thin film transistor has a dual gate electrode structure.

Assignees

• Samsung Display Co Ltd

Inventors

• Kim Se-Ho
• Park Jin-Woo
• Lee Won-Se

Classifications

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title