EL display apparatus

Patent metadata

Field	Value
Publication number	US-9892683-B2
Application number	US-201615335919-A
Country	US
Kind code	B2
Filing date	Oct 27, 2016
Priority date	Sep 7, 2001
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

An electroluminescent (EL) display apparatus and manufacturing method are provided. A display screen includes gate signal lines which are arranged to intersect source signal lines. A pixel corresponds to each intersection of the gate signal lines and the source signal lines. Each pixel includes: an EL device; a driving transistor to supply a current to the EL device; a first switch transistor through which the current is supplied by the driving transistor to the EL device; a second switch transistor provided to supply, to the driving transistor, an image signal supplied to a corresponding one of the source signal lines; a third switch transistor provided between a gate terminal and a drain terminal of the driving transistor; and a capacitor connected to the gate terminal of the driving transistor for holding the image signal. The third switch transistor has a multi-gate structure.

First claim

What is claimed is:

1. An electroluminescent (EL) display apparatus comprising:
a display screen including a plurality of gate signal lines which is arranged to intersect a plurality of source signal lines, and a pixel corresponding to each intersection of the plurality of gate signal lines and the plurality of source signal lines;
a source driver circuit connected to the plurality of source signal lines; and
a gate driver circuit which includes a first gate driver circuit and a second gate driver circuit,
wherein each pixel comprises:
an EL device;
a driving transistor to supply a current to the EL device;
a first switch transistor provided on a current path through which the current is supplied by the driving transistor to the EL device;
a second switch transistor provided to supply, to the driving transistor, an image signal supplied to a corresponding one of the plurality of source signal lines;
a third switch transistor provided between a gate terminal and a drain terminal of the driving transistor; and
a capacitor connected to the gate terminal of the driving transistor for holding the image signal,

the third switch transistor has a multi-gate structure,
the source driver circuit is configured to supply a signal voltage to the gate of the driving transistor to flow a current which is N times as large as a predetermined value to the EL device,
N is greater than one,
the first gate driver circuit includes a first gate signal line and the second gate driver circuit includes a second gate signal line,
the first gate signal line is an on/off signal for the first switch transistor and is connected to a gate terminal of the first switch transistor, and
the second gate signal line is an on/off signal for the second switch transistor and the third switch transistor and is connected to a gate terminal of the second switch transistor and a gate terminal of the third switch transistor.

2. The EL display apparatus according to claim 1 ,
wherein the third switch transistor is a p-channel transistor.

3. The EL display apparatus according to claim 1 ,
wherein the third switch transistor is a p-channel transistor configured to cause the capacitor to hold the image signal for one frame period.

4. The EL display apparatus according to claim 1 ,
wherein the driving transistor, the first switch transistor, the second switch transistor, and the third switch transistor are p-channel transistors.

5. The EL display apparatus according to claim 1 ,
wherein the source driver circuit is configured to supply the signal voltage to the gate of the driving transistor to flow the current which is N times as large as the predetermined value to the EL device to achieve a gray scale display indicated by the image signal.

6. The EL display apparatus according to claim 1 , further comprising:
a precharge circuit or a discharge circuit which forcibly charges or discharges the plurality of source signal lines.

7. The EL display apparatus according to claim 1 ,
wherein, by the first gate driver circuit and the second gate driver circuit, the first switch transistor is independently on/off controlled from the second switch transistor and the third switch transistor.

8. The EL display apparatus according to claim 7 ,
wherein the first gate driver circuit is configured to select a plurality of first gate signal lines simultaneously.

9. The EL display apparatus according to claim 1 ,
wherein an on-time of the EL device of the pixel is 1/M of one frame, and
M is greater than one.

10. The EL display apparatus according to claim 9 ,
wherein M is variable with respect to N for varying a brightness of the EL device during the one frame.

11. An electronic device, comprising:
the EL display apparatus according to claim 1 .

12. A method of manufacturing an electroluminescent (EL) display apparatus,
the EL display apparatus comprising:
a display screen including a plurality of gate signal lines which is arranged to intersect a plurality of source signal lines, and a pixel corresponding to each intersection of the plurality of gate signal lines and the plurality of source signal lines;
a source driver circuit connected to the plurality of source signal lines; and
a gate driver circuit which includes a first gate driver circuit and a second gate driver circuit,

wherein each pixel comprises:
an EL device;
a driving transistor to supply a current to the EL device;
a first switch transistor provided on a current path through which the current is supplied by the driving transistor to the EL device;
a second switch transistor provided to supply, to the driving transistor, an image signal supplied to a corresponding one of the plurality of source signal lines;
a third switch transistor provided between a gate terminal and a drain terminal of the driving transistor; and
a capacitor connected to the gate terminal of the driving transistor for holding the image signal,

the first gate driver circuit includes a first gate signal line and the second gate driver circuit includes a second gate signal line,
the first gate signal line is an on/off signal for the first switch transistor and is connected to a gate terminal of the first switch transistor, and
the second gate signal line is an on/off signal for the second switch transistor and the third switch transistor and is connected to a gate terminal of the second switch transistor and a gate terminal of the third switch transistor,
the method comprising:
fabricating the third switch transistor with a multi-gate structure; and
configuring the source driver circuit to supply a signal voltage to the gate of the driving transistor to flow a current which is N times as large as a predetermined value to the EL device, N being greater than one.

13. The method of manufacturing the EL display apparatus according to claim 12 ,
wherein an on-time of the EL device of the pixel is 1/M of one frame, and
M is greater than one.

14. The method of manufacturing the EL display apparatus according to claim 12 ,
wherein the third switch transistor is a p-channel transistor configured to cause the capacitor to hold the image signal for one frame period.

15. An electroluminescent (EL) display apparatus, comprising:
a display screen including a plurality of gate signal lines which is arranged to intersect a plurality of source signal lines, and a pixel corresponding to each intersection of the plurality of gate signal lines and the plurality of source signal lines; and
a gate driver circuit which includes a first gate driver circuit and a second gate driver circuit,
wherein each pixel comprises:
an EL device;
a driving transistor to supply a current to the EL device;
a first switch transistor provided on a current path through which the current is supplied by the driving transistor to the EL device;
a second switch transistor provided to supply, to the driving transistor, an image signal supplied to a corresponding one of the plurality of source signal lines;
a third switch transistor provided between a gate terminal and a drain terminal of the driving transistor; and
a capacitor connected to the gate terminal of the driving transistor for holding the image signal,

the third switch transistor has a multi-gate structure,
the first gate driver circuit includes a first gate signal line and the second gate driver circuit includes a second gate signal line,
the first gate signal line is an on/off signal for the first switch transistor and is connected to a gate terminal of the first switch transistor, and
the second gate signal line is an on/off signal

Assignees

• Joled Inc

Inventors

• Takahara Hiroshi
• Tsuge Hitoshi

Classifications

• G09G2310/0289

  Details of voltage level shifters arranged for use in a driving circuit · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G3/325

  the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver · CPC title

• G09G2300/0809

  Several active elements per pixel in active matrix panels · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title