Translation bandwidth optimized prefetching strategy through multiple translation lookaside buffers

US11645208B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11645208-B2
Application numberUS-202117215296-A
CountryUS
Kind codeB2
Filing dateMar 29, 2021
Priority dateMar 29, 2021
Publication dateMay 9, 2023
Grant dateMay 9, 2023

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Abstract

Official abstract text for this publication.

A computer system includes a processor and a prefetch engine. The processor is configured to generate a demand access stream. The prefetch engine is configured to generate a first prefetch request and a second prefetch request based on the demand access stream, to output the first prefetch request to a first translation lookaside buffer (TLB), and to output the second prefetch request to a second TLB that is different from the first TLB. The processor performs a first TLB lookup in the first TLB based on one of the demand access stream or the first prefetch request, and performs a second TLB lookup in the second TLB based on the second prefetch request.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method for performing prefetching in a computer processing system, the method comprising: generating, by a processor, a demand access stream; generating, by a prefetch engine, a first prefetch request and a second prefetch request based on the demand access stream; outputting, from the prefetch engine, the first prefetch request to a first translation lookaside buffer (TLB) and the second prefetch request to a second TLB that is different from the first TLB; and performing a first TLB lookup in the first TLB based on one of the demand access stream or the first prefetch request, and performing a second TLB lookup in the second TLB based on the second prefetch request, wherein the first TLB lookup and the second TLB lookup are performed simultaneously, wherein generating the first and second prefetch requests further comprises: monitoring, by the prefetch engine, the demand access stream; determining a demand load associated with the first TLB in response to monitoring the demand access stream; generating the first prefetch request in response to the demand load being less than or equal to a demand threshold; and generating the second prefetch request in response to the demand load exceeding the demand threshold. 2. The computer-implemented method of claim 1 , wherein performing the first TLB lookup further comprises: outputting a first virtual address (VA) included in the demand access stream from the processor; outputting a second VA included in the first prefetch request from the prefetch engine; selectively delivering one of the first VA or the second VA to the first TLB; and performing the first TLB lookup based on the first VA or the second VA delivered to the first TLB. 3. The computer-implemented method of claim 2 , wherein performing the second TLB lookup further comprises: outputting a third VA included in the second prefetch request to the second TLB; and performing the second TLB lookup based on the third VA. 4. The computer-implemented method of claim 3 , outputting the first and second prefetch requests further comprises: outputting the second VA to a first prefetch buffer; outputting the third VA to a second prefetch buffer that is separate from the first prefetch buffer; outputting the second VA from the first prefetch buffer to the first TLB; and outputting the third VA from the second prefetch buffer to the second TLB independently from outputting the second VA from the first prefetch buffer. 5. The computer-implemented method of claim 2 , further comprising: in response to a TLB hit associated with the first TLB lookup, translating the first VA or the second VA into a real address (RA); in response to a TLB miss associated with the first TLB lookup, outputting the first VA or the second VA to the second TLB; performing a third TLB lookup in the second TLB based on the first VA or the second VA; in response to a TLB hit associated with the third TLB lookup, determining a RA corresponding to the first VA or the second VA, and returning the RA corresponding to the first VA or the second VA to the first TLB; and translating, using the first TLB, the first VA or the second VA using the RA obtained from the second TLB. 6. A computer system comprising: a processor configured to generate a demand access stream; a prefetch engine configured to generate a first prefetch request and a second prefetch request based on the demand access stream, to output the first prefetch request to a first translation lookaside buffer (TLB), and to output the second prefetch request to a second TLB that is different from the first TLB, wherein the processor performs a first TLB lookup in the first TLB based on one of the demand access stream or the first prefetch request, and performs a second TLB lookup in the second TLB based on the second prefetch request, wherein the first TLB lookup and the second TLB lookup are performed simultaneously, wherein the prefetch engine generates the first and second prefetch requests in response to monitoring the demand access stream, determining a demand load associated with the first TLB in response to monitoring the demand access stream, generating the first prefetch request in response to the demand load being less than or equal to a demand threshold, generating the second prefetch request in response to the demand load exceeding the demand threshold. 7. The computer system of claim 6 , wherein the processor performs the first TLB lookup in response to outputting a first virtual address (VA) included in the demand access stream from the processor, outputting a second VA included in the first prefetch request from the prefetch engine, selectively delivering one of the first VA or the second VA to the first TLB, and performing the first TLB lookup based on the first VA or the second VA delivered to the first TLB. 8. The computer system of claim 7 , wherein the processor performs the second TLB lookup in response to outputting a third VA included in the second prefetch request to the second TLB, and performing the second TLB lookup based on the third VA. 9. The computer system of claim 8 , outputting the processor performs the first and second prefetch requests in response to outputting the second VA to a first prefetch buffer, outputting the third VA to a second prefetch buffer that is separate from the first prefetch buffer, outputting the second VA from the first prefetch buffer to the first TLB, and outputting the third VA from the second prefetch buffer to the second TLB independently from outputting the second VA from the first prefetch buffer. 10. The computer system of claim 7 , wherein in response to a TLB hit associated with the first TLB lookup, the processor translates the first VA or the second VA into a real address (RA), wherein in response to a TLB miss associated with the first TLB lookup, the processor outputs the first VA or the second VA to the second TLB. 11. The computer system of claim 10 , wherein the processor performs a third TLB lookup in the second TLB based on the first VA or the second VA, and in response to a TLB hit associated with the third TLB lookup, the processor determines a RA corresponding to the first VA or the second VA, returns the RA corresponding to the first VA or the second VA to the first TLB, and uses the first TLB to translate the first VA or the second VA using the RA obtained from the L2 TLB. 12. A computer program product to control a computer processing system to perform prefetching, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by an electronic computer processor to control the computer processing system to perform operations comprising: generate a demand access stream; generate, by a prefetch engine, a first prefetch request and a second prefetch request based on the demand access stream; output, from the prefetch engine, the first prefetch request to a first translation lookaside buffer (TLB) and the second prefetch request to a second TLB that is different from the first TLB; perform a first TLB lookup in the first TLB based on one of the demand access stream or the first prefetch request; and perform a second TLB lookup in the second TLB based on the second prefetch request, wherein the first TLB lookup and the second TLB lookup are performed simultaneously, wherein generating the first and second prefetch requests further comprises: monitoring, by the prefetch engine, the demand access stream; determining a demand load associated with the first TLB in response to monitoring the demand acce

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What does patent US11645208B2 cover?
A computer system includes a processor and a prefetch engine. The processor is configured to generate a demand access stream. The prefetch engine is configured to generate a first prefetch request and a second prefetch request based on the demand access stream, to output the first prefetch request to a first translation lookaside buffer (TLB), and to output the second prefetch request to a seco…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F12/0862. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 09 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).