Semiconductor device

US11581439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11581439-B2
Application numberUS-201916693482-A
CountryUS
Kind codeB2
Filing dateNov 25, 2019
Priority dateJun 27, 2013
Publication dateFeb 14, 2023
Grant dateFeb 14, 2023

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To provide a semiconductor device in which a large current can flow. To provide a semiconductor device which can be driven stably at a high driving voltage. The semiconductor device includes a semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer and apart from each other in a region overlapping with the semiconductor layer, a first gate electrode and a second gate electrode with the semiconductor layer therebetween, a first gate insulating layer between the semiconductor layer and the first gate electrode, and a second gate insulating layer between the semiconductor layer and the second gate electrode. The first gate electrode overlaps with part of the first electrode, the semiconductor layer, and part of the second electrode. The second gate electrode overlaps with the semiconductor layer and part of the first electrode, and does not overlap with the second electrode.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a semiconductor layer including a channel formation region; a first electrode and a second electrode electrically connected to the semiconductor layer; a first gate insulating layer and a second gate insulating layer with the semiconductor layer therebetween; a first gate electrode overlapping with the first electrode, the semiconductor layer, and the second electrode through the first gate insulating layer; and a second gate electrode overlapping with the semiconductor layer and the first electrode through the second gate insulating layer, wherein an outer end of the second gate electrode extends beyond an end of the semiconductor layer, and an inner end of the second gate electrode overlaps with the semiconductor layer, wherein each of the first gate electrode and the second gate electrode has a circular ring shape with an opening, and wherein, in a top view, the opening of the second gate electrode is larger than the opening of the first gate electrode. 2. The semiconductor device according to claim 1 , wherein the first electrode is a drain electrode, and wherein the second electrode is a source electrode. 3. The semiconductor device according to claim 1 , wherein the first electrode is a source electrode, and wherein the second electrode is a drain electrode. 4. The semiconductor device according to claim 3 , wherein the second gate electrode is configured to receive a potential lower than a potential applied to the source electrode. 5. The semiconductor device according to claim 1 , wherein the semiconductor layer has an island shape, wherein one of the first electrode and the second electrode has a ring shape and an opening of the ring shape overlaps with the semiconductor layer, and wherein the other of the first electrode and the second electrode is in the opening. 6. The semiconductor device according to claim 1 , wherein the semiconductor layer includes an oxide semiconductor. 7. The semiconductor device according to claim 6 , further comprising: a first oxide layer between the semiconductor layer and the second gate insulating layer; and a second oxide layer between the semiconductor layer and the first gate insulating layer, wherein the first oxide layer and the second oxide layer each contain one or more of metal elements contained in the semiconductor layer.

Assignees

Inventors

Classifications

  • having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title

  • having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

  • characterised by the shapes, relative sizes or dispositions of the gate electrodes · CPC title

  • Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

  • Subject matter not provided for in other groups of this subclass · CPC title

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Frequently asked questions

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What does patent US11581439B2 cover?
To provide a semiconductor device in which a large current can flow. To provide a semiconductor device which can be driven stably at a high driving voltage. The semiconductor device includes a semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer and apart from each other in a region overlapping with the semiconductor layer, a first gate…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 14 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).