Method for manufacturing semiconductor device

US9601603B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9601603-B2
Application numberUS-201615071674-A
CountryUS
Kind codeB2
Filing dateMar 16, 2016
Priority dateOct 24, 2008
Publication dateMar 21, 2017
Grant dateMar 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device, comprising: forming a first conductive film that serves as a gate electrode of a transistor; forming a first insulating film over the first conductive film; forming an oxide semiconductor layer that comprises a channel formation region over the first insulating film; forming a second insulating film over the oxide semiconductor layer; and forming a transparent film over the second insulating film by a sputtering method, wherein the first conductive film and the transparent film overlap each other with the oxide semiconductor layer therebetween, and wherein the transparent film has a larger width than the oxide semiconductor layer in a channel width direction of the transistor. 2. The method according to claim 1 , wherein the transparent film has a larger width than the oxide semiconductor layer in a channel length direction of the transistor. 3. The method according to claim 1 , further comprising: forming a source electrode and a drain electrode by patterning a second conductive film formed over the oxide semiconductor layer, whereby a top surface of a first region of the oxide semiconductor layer that is located between the source electrode and the drain electrode is partially etched to have a smaller thickness than a second region of the oxide semiconductor layer that is below the source electrode or the drain electrode. 4. The method according to claim 1 , wherein the oxide semiconductor layer includes indium, zinc, and a metal different from indium and zinc. 5. The method according to claim 1 , wherein the transparent film is a conductive film. 6. The method according to claim 1 , further comprising: performing a heat treatment on the oxide semiconductor layer. 7. The method according to claim 1 , wherein the second insulating film is an oxide insulating film. 8. The method according to claim 1 , wherein the second insulating film is in contact with the oxide semiconductor layer and the transparent film. 9. The method according to claim 1 , wherein the transparent film includes indium. 10. The method according to claim 1 , wherein the transparent film includes zinc. 11. A method for manufacturing a semiconductor device, comprising: forming a first conductive film that serves as a first gate electrode of a transistor; forming a first insulating film over the first conductive film; forming an oxide semiconductor layer that comprises a channel formation region over the first insulating film; forming a source electrode and a drain electrode by patterning a second conductive film formed over the oxide semiconductor layer, whereby a top surface of a first region of the oxide semiconductor layer that is located between the source electrode and the drain electrode is etched to have a smaller thickness than a second region of the oxide semiconductor layer that is below the source electrode or the drain electrode; forming a second insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode; and forming a transparent film over the second insulating film by a sputtering method. 12. The method according to claim 11 , wherein the oxide semiconductor layer includes indium, zinc, and a metal different from indium and zinc. 13. The method according to claim 11 , wherein the transparent film is a conductive film. 14. The method according to claim 11 , further comprising: performing a heat treatment on the oxide semiconductor layer. 15. The method according to claim 11 , wherein the second insulating film is in contact with the oxide semiconductor layer and the transparent film. 16. The method according to claim 11 , wherein the transparent film includes indium. 17. The method according to claim 11 , wherein the transparent film includes zinc. 18. A method for manufacturing a semiconductor device, comprising: forming a first conductive film that serves as a first gate electrode of a transistor; forming a first insulating film over the first conductive film; forming an oxide semiconductor layer that comprises a channel formation region over the first insulating film; forming a source electrode and a drain electrode by patterning a second conductive film formed over the oxide semiconductor layer, whereby a top surface of a first region of the oxide semiconductor layer that is located between the source electrode and the drain electrode is etched to have a smaller thickness than a second region of the oxide semiconductor layer that is below the source electrode or the drain electrode; forming a second insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode; and forming a transparent film over the second insulating film by a sputtering method, wherein the second insulating film is an oxide insulating film. 19. The method according to claim 18 , wherein the oxide semiconductor layer includes indium, zinc, and a metal different from indium and zinc. 20. The method according to claim 18 , wherein the transparent film is a conductive film. 21. The method according to claim 18 , further comprising: performing a heat treatment on the oxide semiconductor layer. 22. The method according to claim 18 , wherein the second insulating film is in contact with the oxide semiconductor layer and the transparent film. 23. The method according to claim 18 , wherein the transparent film includes indium. 24. The method according to claim 18 , wherein the transparent film includes zinc.

Assignees

Inventors

Classifications

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)} · CPC title

  • H10D86/441Primary

    Interconnections, e.g. scanning lines · CPC title

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What does patent US9601603B2 cover?
As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/441. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).