Microelectronic device substrate formed by additive process

Patent metadata

Field	Value
Publication number	US-11404270-B2
Application number	US-201816206050-A
Country	US
Kind code	B2
Filing date	Nov 30, 2018
Priority date	Nov 30, 2018
Publication date	Aug 2, 2022
Grant date	Aug 2, 2022

Abstract

A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.

First claim

What is claimed is:

1. A method of forming a microelectronic device, comprising:
forming a substrate on a workpiece, the substrate having a bottom surface contacting the workpiece and a component surface opposite from the bottom surface, by a process including:
forming a first semiconductor structure on the workpiece for a first component by a first dispensing process using a first semiconductor precursor in the substrate of the microelectronic device, the first semiconductor structure and the first semiconductor precursor having a first conductivity type, the first semiconductor precursor including neopentasilane, the first semiconductor structure extending from the component surface to the bottom surface; and
forming a second semiconductor structure on the workpiece for a second component by a second dispensing process using a second semiconductor precursor in the substrate, the second semiconductor structure and the second semiconductor precursor having a second conductivity type opposite from the first conductivity type, the second semiconductor structure extending from the component surface to the bottom surface; and
removing the substrate from the workpiece and exposing the bottom surface.

2. A method of forming a microelectronic device, comprising:
forming a substrate on a workpiece, the substrate having a bottom surface contacting the workpiece and a component surface opposite from the bottom surface, the component surface being planar, by a process including:
forming a semiconductor material having a conductivity type by a first dispensing process using a semiconductor precursor in the substrate, the semiconductor precursor including neopentasilane and having the conductivity type; and
forming a dielectric material by a second dispensing process using a dielectric precursor in the substrate, in which:
the dielectric material contacts the semiconductor material; and
the semiconductor material extends from the bottom surface to the component surface; and

removing the substrate from the workpiece and exposing the bottom surface.

3. The method of claim 2 , in which the dielectric material is in an isolation structure of the substrate.

4. The method of claim 2 , in which the dielectric material extends to the component surface.

5. A method of forming a microelectronic device, comprising:
forming a substrate on a workpiece, the substrate having a bottom surface contacting the workpiece and a component surface opposite from the bottom surface, the component surface being planar, by a process including:
forming a first semiconductor structure for a first component by a first dispensing process using a first semiconductor precursor that includes neopentasilane, the first semiconductor structure and the first semiconductor precursor having a first conductivity type, the first semiconductor structure extending to the component surface;
forming a second semiconductor structure for a second component by a second dispensing process using a second semiconductor precursor, the second semiconductor structure and the second semiconductor precursor having a second conductivity type, opposite from the first conductivity type, the second semiconductor structure extending to the component surface; and
forming a dielectric material by a third dispensing process using a precursor, the dielectric material contacting the first semiconductor structure, contacting the second semiconductor structure, and laterally separating the first semiconductor structure from the second semiconductor structure; and

removing the substrate from the workpiece and exposing the bottom surface.

6. The method of claim 5 , in which the dielectric material extends to the component surface.

7. The method of claim 5 , in which the first semiconductor structure extends to the bottom surface, and the second semiconductor structure extends to the bottom surface.

8. The method of claim 7 , in which the dielectric material extends to the bottom surface.

9. The method of claim 5 , including forming component structures on the component surface.

Assignees

• Texas Instruments Inc

Inventors

• Cook Benjamin Stassen
• Revier Daniel Lee

Classifications

• H10D62/116

  adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions · CPC title

• H10P72/0448

  Apparatus for applying a liquid, a resin, an ink or the like · CPC title

• H10P14/6686

  the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane · CPC title

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P14/6346

  using printing, e.g. ink-jet printing · CPC title