Separate trims for buffer and snapshot

Patent metadata

Field	Value
Publication number	US-11301346-B2
Application number	US-202017005114-A
Country	US
Kind code	B2
Filing date	Aug 27, 2020
Priority date	Aug 27, 2020
Publication date	Apr 12, 2022
Grant date	Apr 12, 2022

Abstract

A system includes a processing device and a memory device coupled to the processing device. The memory device can include a cyclic buffer portion and a snapshot portion. The processing device can store time based telemetric sensor data in the cyclic buffer portion, copy an amount of the telemetric sensor data from the cyclic buffer portion to the snapshot portion in response to a trigger event, operate the cyclic buffer portion with a first trim tailored to a performance target of the cyclic buffer portion, and operate the snapshot portion with a second trim tailored to a performance target of the snapshot portion.

First claim

What is claimed is:

1. A system comprising:
a processing device;
a memory device coupled to the processing device, the memory device including a cyclic buffer portion and a snapshot portion; and
a hold-up capacitor coupled to the memory device;
wherein the processing device is to:
store time based telemetric sensor data as one bit per cell in memory cells in the cyclic buffer portion;

copy an amount of the telemetric sensor data from the cyclic buffer portion to the snapshot portion in response to a trigger event, wherein the processing device is to:
store one or more bits per cell in memory cells of the snapshot portion in response to the hold-up capacitor not providing power therefor; and
store one bit per cell in memory cells of the snapshot portion in response to the hold-up capacitor providing power therefor;
operate the cyclic buffer portion with a first trim tailored to a performance target of the cyclic buffer portion; and
operate the snapshot portion with a second trim tailored to a performance target of the snapshot portion.

2. The system of claim 1 , wherein the performance target of the cyclic buffer portion comprises memory cell endurance; and
wherein the performance target of the snapshot portion comprises data retention.

3. The system of claim 2 , wherein the processing device is further to sequentially store new time based telemetric sensor data in the cyclic buffer portion; and
erase older telemetric sensor data.

4. The system of claim 1 , wherein the first trim provides a relatively small read window; and
wherein the second trim provides a relatively large read window.

5. The system of claim 1 , wherein the cyclic buffer portion and the snapshot portion are within a same partition of the memory device.

6. The system of claim 1 , wherein the memory device comprises non-volatile memory; and
wherein the hold-up capacitor is to provide power for the copy in response to a loss of system power associated with the trigger event.

7. The system of claim 6 , wherein the system comprises a solid state drive to provide event recorder storage for an autonomous vehicle.

8. The system of claim 6 , wherein the amount of the time based telemetric sensor data is predefined for a period of time immediately preceding the trigger event.

9. A method, comprising:
storing time based telemetric sensor data as one bit per cell in memory cells in a cyclic buffer portion of a memory device with a first trim tailored to memory cell endurance;
copying an amount of the telemetric sensor data from the cyclic buffer portion in response to a trigger event; and
storing the copy as one or more bits per cell in memory cells of a snapshot portion of the memory device with a second trim tailored to data retention in response to a hold-up capacitor not providing power for the copy.

10. The method of claim 9 , wherein storing time based telemetric sensor data in a cyclic buffer portion with the first trim provides a relatively small read window; and
wherein copying the amount of the telemetric sensor data from the cyclic buffer portion to the snapshot portion with the second trim provides a relatively large read window.

11. The method of claim 9 , further comprising operating the memory cells of the cyclic buffer portion with a faster programming time than a programming time for the memory cells of the snapshot portion.

12. The method of claim 9 , further comprising providing power for the copy from a system power supply.

13. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
program memory cells of a cyclic buffer portion of a memory device to store one bit per cell with a relatively small read window to store time based telemetric sensor data; and
program memory cells of a snapshot portion of the memory device with a relatively large read window to store an amount of the telemetric sensor data from the cyclic buffer portion therein, wherein the instructions to program memory cells of the snapshot portion include instructions to:
store one or more bits per cell in memory cells of the snapshot portion in response to a hold-up capacitor not providing power therefor; and
store one bit per cell in memory cells of the snapshot portion in response to the hold-up capacitor providing power therefor.

14. The medium of claim 13 , wherein the instructions to program the memory cells of the snapshot portion comprise instructions to program the memory cells of the snapshot portion in response to a trigger event.

15. The medium of claim 14 , wherein the trigger event comprises a vehicle accident.

16. The medium of claim 14 , wherein the instructions to program the memory cells of the cyclic buffer portion comprise instructions to periodically program the memory cells of the cyclic buffer portion to store new time based telemetric sensor data.

17. A method, comprising:
storing time based telemetric sensor data as one bit per cell in memory cells in a cyclic buffer portion of a memory device with a first trim tailored to memory cell endurance; and
copying an amount of the telemetric sensor data from the cyclic buffer portion in response to a trigger event; and
storing the copy as one bit per cell in memory cells of a snapshot portion of the memory device with a second trim tailored to data retention in response to a hold-up capacitor providing power for the copy.

18. The method of claim 17 , further comprising providing power for the copy from a hold-up capacitor in response to a loss of system power associated with the trigger event.

Assignees

• Micron Technology Inc

Inventors

• Marquart Todd A
• Righetti Niccolo′
• Mcneil Jr Jeffrey S
• Goda Akira
• Muchherla Kishore K
• Helm Mark A
• Golov Gil
• Binfet Jeremy
• Miccoli Carmine
• Puzzilli Giuseppina

Classifications

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F11/3409

  for performance assessment · CPC title

• G06F11/3037 Primary

  where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00) · CPC title

• G06F11/3034 Primary

  where the computing system component is a storage system, e.g. DASD based or network based (digital input from or digital output to record carriers G06F3/06; digital recording or reproducing G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097) · CPC title

• G06F11/1469

  Backup restoration techniques · CPC title