Method for manufacturing circuit board

Patent metadata

Field	Value
Publication number	US-11294285-B2
Application number	US-202016843123-A
Country	US
Kind code	B2
Filing date	Apr 8, 2020
Priority date	Oct 13, 2017
Publication date	Apr 5, 2022
Grant date	Apr 5, 2022

Abstract

A method for manufacturing the circuit board comprises following steps of forming a silver layer on each of two opposite surfaces of an insulating substrate, and forming a copper layer on each silver layer, thereby obtaining a middle structure; defining at least one through-hole on the middle structure, and each through-hole extending through each copper layer; forming a copper wiring layer on the copper layers to cover each through-hole and a portion region of the copper layers, the copper wiring layer comprising a copper conductive structure passing through each through-hole, the copper conductive structure connecting the copper layers; removing the copper layers not covered by the copper wiring layer; and etching the silver layers to form a silver wiring layer corresponding to the copper wiring layer, wherein a first etching liquid, which does not etch the copper wiring layer, is used for etching the silver layers.

First claim

What is claimed is:

1. A method for manufacturing the circuit board comprising:
forming a silver layer on each of two opposite surfaces of an insulating substrate, and forming a copper layer on a side of each silver layer away from the insulating substrate, the insulating substrate, two silver layers, and two copper layers forming a middle structure;
defining at least one through-hole on the middle structure, and each of the at least one through-hole extending through each copper layer;
forming a copper wiring layer on a portion region of each copper layer, the copper wiring layer further filling in and covering each of the at least one through hole, the copper wiring layer comprising a copper conductive structure passing through each of the at least one through-hole, the copper conductive structure connecting the copper layers;
removing the copper layers not covered by the copper wiring layer; and
etching the silver layers to form a silver wiring layer corresponding to the copper wiring layer, wherein a first etching liquid, which does not etch the copper wiring layer, is used for etching the silver layers, a width of each line of the silver wiring layer is less than a width of a corresponding line of the copper wiring layer, and a spacing between two lines of the silver wiring layer is greater than a spacing between two corresponding lines of the copper wiring layer.

2. The method of the claim 1 , wherein the silver layers are formed by the following steps:
coating a silver paste with nano silver particles on two opposite surfaces of an insulating substrate; and
heating to cure the silver paste with nano silver particles, thereby forming a silver layer on each of the two opposite surfaces.

3. The method of the claim 2 , wherein a diameter of each nano silver particle is less than 100 nm.

4. The method of the claim 1 , wherein each silver layer has a thickness of about 0.15 μm to about 0.3 μm.

5. The method of the claim 1 , wherein the copper wiring layer is formed by the following steps:
forming a photosensitive layer on a side of each copper layer away from the insulating substrate to cover the copper layer and each of the at least one through-hole;
exposing and etching two photosensitive layers to form a pattern on the photosensitive layers to expose each of the at least one through-hole and a portion region of two copper layers, the pattern comprising an opening corresponding to each of the at least one through-hole;
forming the copper wiring layer corresponding to the pattern; and
peeling the photosensitive layers exposed and etched off.

6. The method of the claim 1 , wherein after defining the at least one through-hole on the middle structure, and before forming the copper wiring layer on the copper layers to cover each of the at least one through-hole and the portion region of the copper layers, the method further comprising:
processing each through-hole by shadow process.

7. The method of the claim 6 , wherein a graphite layer is formed on an inner surface of each of the at least one through-hole by the shadow process.

8. The method of the claim 1 , wherein after etching the silver layers to form a silver wiring layer corresponding to the copper wiring layer, the method further comprises:
selecting a second etching liquid which does not etch the copper wiring layer and the silver wiring layer; and
removing the silver layers remained after forming the silver wiring layer by etching the insulating substrate which is not covered by the copper wiring layer with the second etching liquid.

9. The method of the claim 1 , wherein each copper layer has a thickness in a range of 0.5 μm to 1.0 μm.

Assignees

• Hongqisheng Prec Electronics Qinhuangdao Co Ltd
• Avary Holding Shenzhen Co Ltd

Inventors

• Hu xian-qin
• Yang Mei
• Dai Jun

Classifications

• C23C28/023 Primary

  only coatings of metal elements only · CPC title

• H05K3/188

  by direct electroplating · CPC title

• H05K3/38

  Improvement of the adhesion between the insulating substrate and the metal · CPC title

• C23C30/00

  Coating with metallic material characterised only by the composition of the metallic material, i.e. not characterised by the coating process (C23C26/00, C23C28/00 take precedence) · CPC title

• C23F1/02

  Local etching · CPC title