Field-effect transistors with self-aligned and non-self-aligned contact openings
US-2020335591-A1 · Oct 22, 2020 · US
US11276607B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11276607-B2 |
| Application number | US-201916570059-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 13, 2019 |
| Priority date | Sep 13, 2019 |
| Publication date | Mar 15, 2022 |
| Grant date | Mar 15, 2022 |
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Methods and structures for forming vias are provided. The method includes forming a structure that includes an odd line hardmask and an even line hardmask. The odd line hardmask and the even line hardmask include different hardmask materials that have different etch selectivity with respect to each other. The method includes patterning vias separately into the odd line hardmask and the even line hardmask based on the different etch selectivity of the different hardmask materials. The method also includes forming via plugs at the vias. The method includes cutting even line cuts and odd line cuts into the structure. The even line cuts and the odd line cuts are self-aligned with the vias. The vias are formed at line ends of the structure.
Opening claim text (preview).
What is claimed is: 1. A method for forming vias, comprising: forming a structure that includes an odd line hardmask and an even line hardmask on a same level, wherein the odd line hardmask and the even line hardmask include different hardmask materials that have different etch selectivity with respect to each other; patterning vias separately into the odd line hardmask and the even line hardmask based on the different etch selectivity of the different hardmask materials; forming via plugs at the vias; and cutting even line cuts and odd line cuts separately into the structure based on the different selectivity of the different hardmask materials, wherein the even line cuts and the odd line cuts are self-aligned with the vias and the vias are solely formed onto end portions of a metal line contacting a top surface of the metal line. 2. The method of claim 1 , wherein patterning the vias separately into the odd line hardmask and the even line hardmask further comprises: placing the vias on at least one side of a line cut region. 3. The method of claim 1 , wherein patterning the vias separately into the odd line hardmask and the even line hardmask further comprises: patterning the vias using direct lithography and spacer based tone inversion. 4. The method of claim 3 , wherein a critical dimension (CD) of the vias is defined by at least one of the direct lithography and a spacer thickness. 5. The method of claim 1 , further comprising: controlling placement of the vias to at least one line end by performing a self-aligned metal cut by via mask. 6. The method of claim 1 , wherein patterning the vias separately into the odd line hardmask and the even line hardmask further comprises: patterning the vias using direct self-assembly (DSA). 7. The method of claim 1 , wherein one of the odd line hardmask and the even line hardmask is selected from the group consisting of silicon nitride (SiN) and amorphous silicon (a-Si) and the other of the odd line hardmask and the even line hardmask is selected from the group consisting of silicon oxide (SiO x ) and spin-on-glass (SoG). 8. The method of claim 1 , wherein patterning vias separately into the odd line hardmask and the even line hardmask further comprises: planting the vias into the odd line hardmask; planting vias into the even line hardmask; and filling the vias with via plug material in the odd line hardmask and the even line hardmask; and etching back the via plug material to form the via plugs. 9. The method of claim 1 , wherein the via plugs include a compound of titanium nitride. 10. The method of claim 1 , wherein cutting the even line cuts and the odd line cuts into the structure further comprises: cutting lines into the structure; stripping the odd line hardmask and the even line hardmask; and recessing the lines to form vias. 11. The method of claim 1 , wherein a patterning mask used for patterning the vias is selected from the group consisting of an organic planarization layer (OPL), silicon containing anti-reflective coating (SiARC), photoresist (PR) trilayer patterning mask and an OPL, in-situ radical assisted deposition (iRAD), bottom anti-reflective coating (BARC), PR quadstack patterning mask, and combinations thereof. 12. A method for forming vias, comprising: selectively depositing a first hardmask including multiple metal lines on a structure; and selectively depositing a second hardmask in alternating lines to the multiple metal lines, wherein the first hardmask and the second hardmask include different hardmask materials that have different etch selectivity with respect to each other and the first and the second hardmask are formed on a same level; and selectively patterning at least one of the first hardmask and the second hardmask based on the different etch selectivity of the different hardmask materials, wherein the selective patterning provides the openings for the vias, the vias being are solely formed onto end portions of the multiple metal lines contacting a top surface of the multiple metal lines. 13. The method of claim 12 , wherein selectively patterning the at least one of the first hardmask and the second hardmask further comprises: patterning the at least one of the first hardmask and the second hardmask at a predetermined pitch with spacers on the structure. 14. The method of claim 13 , further comprising: performing spacer etch back on the spacers to expose tips of the first hardmask and a bottom hardmask; depositing a planarization layer; patterning even lines into the structure; depositing the second hardmask to fill the even lines in the structure; and removing the spacers. 15. The method of claim 14 , wherein patterning the even lines into the structure further comprises: patterning the even lines using fill material for pattern transfer and a photoresist. 16. The method of claim 12 , further comprising: performing self-aligned litho-etch-litho-etch (SALELE) on the structure.
using subtractive patterning of the conductive members · CPC title
by forming self-aligned vias · CPC title
characterised by the processes involved to create the masks · CPC title
characterised by their composition, e.g. multilayer masks · CPC title
by forming self-aligned vias or self-aligned contact plugs · CPC title
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