Permanent wafer handlers with through silicon vias for thermalization and qubit modification

US11158781B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11158781-B2
Application numberUS-201916698171-A
CountryUS
Kind codeB2
Filing dateNov 27, 2019
Priority dateNov 27, 2019
Publication dateOct 26, 2021
Grant dateOct 26, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A quantum device includes a qubit chip having a plurality of qubits and an interposer attached to and electrically connected to the qubit chip. The device also includes a substrate handler attached to one side of the qubit chip or to one side of the interposer, or both so as to be thermally in contact with the qubit chip or the interposer, or both. The substrate handler includes a plurality of vias, at least a portion of plurality of vias being filled with a non-superconducting material, the non-superconducting material being selected to dissipate heat generated in the qubit chip, the interposer or both.

First claim

Opening claim text (preview).

We claim: 1. A quantum device, comprising: a qubit chip comprising a plurality of qubits; an interposer attached to and electrically connected to the qubit chip; a substrate handler attached to one side of the qubit chip or to one side of the interposer, or both so as to be thermally in contact with the qubit chip or the interposer, or both; and a substrate attached to and electrically connected to the interposer using a plurality of solder bumps, wherein the substrate handler includes a plurality of vias, at least a portion of plurality of vias being filled with a non-superconducting material, the non-superconducting material being selected to dissipate heat generated in the qubit chip, the interposer or both. 2. The quantum device according to claim 1 , wherein the interposer is attached to and electrically connected to the qubit chip using solder bumps. 3. The quantum device according to claim 1 , further comprising a bonding material, wherein the substrate handler is attached to the one side of the qubit chip or to the one side of the interposer, or both using the bonding material. 4. The quantum device according to claim 3 , wherein the bonding material is an adhesive bonding material or a metal or an oxide bonding. 5. The quantum device according to claim 3 , wherein the bonding material is selected from the group consisting of: polyimide, benzocyclobutene (BCB), acrylic, Al—Al bonding, In—In bonding, Sn—Sn boding, Au—Sn bonding, Au—In bonding, and Sn—In bonding. 6. The quantum device according to claim 1 , further comprising a plurality of thermally conductive studs configured and arranged to thermally connect the substrate handler to the one side of the qubit chip or to said one side of the interposer, or both. 7. The quantum device according to claim 1 , further comprising a superconducting material, wherein the qubit chip and the interposer comprise a plurality of vias, at least a portion of said vias being filled with the superconducting material. 8. The quantum device according to claim 7 , wherein a back side of the qubit chip opposite to a side having the plurality of qubits has a layer of the superconducting material and a back side of the interposer opposite to a side of the interposer attached to and electrically connected to the qubit chip has a layer of the superconducting material. 9. The quantum device according to claim 1 , wherein the substrate handler comprises a plurality of vias, a portion of said plurality of vias being filled with superconducting material and at least one of said plurality of vias being substantially empty to operate as at least one window-via. 10. The quantum device according to claim 9 , wherein said at least one window-via is located on a back side of a location of a qubit of said plurality of qubits so as to enable a laser beam to be transmitted through said at least one window-via to controllably remove a metal layer connected to the qubit and change a capacitance of the qubit. 11. The quantum device according to claim 9 , wherein the interposer and the substrate handler comprise at least one window-via that traverses both the interposer and the substrate handler so as to enable a laser beam to be transmitted therethrough to a frontside of said qubit to modify said qubit. 12. The quantum device according to claim 9 , wherein the interposer and the substrate handler comprise at least one window-via that traverses both the interposer and the substrate handler so as to enable a plasma to be transmitted therethrough to the qubit chip. 13. The quantum device according to claim 1 , wherein the interposer comprises a plurality of vias, a first portion of said plurality of vias is filled with superconducting material for ground connection and a second portion of said plurality of vias is filled with superconducting material for signal transmission. 14. The quantum device according to claim 1 , further comprising a first heat sink thermally and mechanically in contact with the substrate handler, the first heat sink being configured to further dissipate heat dissipated by the substrate handler. 15. The quantum device according to claim 1 , wherein said substrate is an organic substrate. 16. The quantum device according to claim 15 , wherein the first heat sink is further attached to the organic substrate. 17. The quantum device according to claim 1 , wherein the substrate comprises a laminate.

Assignees

Inventors

Classifications

  • comprising use of blind vias during the manufacture · CPC title

  • Through-vias · CPC title

  • Superconducting materials · CPC title

  • Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

  • Bolts or screws · CPC title

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Frequently asked questions

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What does patent US11158781B2 cover?
A quantum device includes a qubit chip having a plurality of qubits and an interposer attached to and electrically connected to the qubit chip. The device also includes a substrate handler attached to one side of the qubit chip or to one side of the interposer, or both so as to be thermally in contact with the qubit chip or the interposer, or both. The substrate handler includes a plurality of …
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W40/228. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 26 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).